JPH0436235U - - Google Patents
Info
- Publication number
- JPH0436235U JPH0436235U JP1990078382U JP7838290U JPH0436235U JP H0436235 U JPH0436235 U JP H0436235U JP 1990078382 U JP1990078382 U JP 1990078382U JP 7838290 U JP7838290 U JP 7838290U JP H0436235 U JPH0436235 U JP H0436235U
- Authority
- JP
- Japan
- Prior art keywords
- recess
- insulating base
- semiconductor device
- package
- lid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Die Bonding (AREA)
Description
第１図は本考案に係る半導体素子収納用パツケ
ージの一実施例を示す断面図である。
１……絶縁基体、１ａ……凹部、２……蓋体、
４……金属層、５……接着材、６，６……封止用
ガラス部材。
FIG. 1 is a sectional view showing an embodiment of a package for housing semiconductor elements according to the present invention. 1... Insulating base, 1a... Recess, 2... Lid,
4... Metal layer, 5... Adhesive material, 6, 6... Glass member for sealing.
Claims (1)
る絶縁基体と蓋体とから成る半導体素子収納用パ
ツケージにおいて、前記絶縁基体の凹部底面に結
晶粒径が８．０乃至１４．０μｍの銀から成る金
属層を被着させたことを特徴とする半導体素子収
納用パツケージ。 In a semiconductor device storage package comprising an insulating base and a lid having a recess on the upper surface for accommodating the semiconductor device, a metal made of silver having a crystal grain size of 8.0 to 14.0 μm is provided on the bottom of the recess of the insulating base. A package cage for storing semiconductor elements characterized by having a layer applied thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990078382U JPH0436235U (en) | 1990-07-24 | 1990-07-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990078382U JPH0436235U (en) | 1990-07-24 | 1990-07-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0436235U true JPH0436235U (en) | 1992-03-26 |
Family
ID=31621613
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990078382U Pending JPH0436235U (en) | 1990-07-24 | 1990-07-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0436235U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4948266A (en) * | 1972-09-13 | 1974-05-10 |
-
1990
- 1990-07-24 JP JP1990078382U patent/JPH0436235U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4948266A (en) * | 1972-09-13 | 1974-05-10 |