JPH0437209A - Gain control driving circuit - Google Patents

Abstract

PURPOSE:To obtain a large output amplitude by detecting a collector voltage ratio of a gain control driving circuit varying the collector voltage ratio of two transistors(TRs) whose collector connects to a load resistor from which an output is extracted, and supplying a current in response to a detection output to the collector of a TR whose collector is connected to a load resistor from which an output is extracted. CONSTITUTION:Each base of a differential amplifier circuit comprising TRs Q10, Q11 connects t the base of TRs Q3, Q4 of a conventional gain control driving circuit and the base voltage ratio of TRs Q3, Q4 is detected at the base of the TRs Q10, Q11. Then the collector current of the TR Q10 is supplied to the collector of a TR Q4 by a current mirror circuit Cu1 comprising TRs Q8, Q9 to decrease the voltage drop of a load resistor R3. Thus, when currents I1, I4 of constant current sources 2, 5 are set to proper values by taking a power voltage and an output amplitude into account, the output amplitude is increased.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a gain control amplification circuit, and particularly to a gain control amplification circuit that can provide a large output amplitude even when the gain is increased at a low power supply voltage.

[Prior art] Conventionally, as this type of amplifier circuit, a circuit shown in FIG. 2 is known.

The structure includes a transistor Q1 whose base is an input terminal, and a transistor Q2 whose emitters are differentially connected to the transistor Q1. Resistors R3 and R2 are connected to the emitters of these transistors Q and Q2, respectively, and the common emitters are connected to a low power source 8 via a constant current source 2. The collector of transistor Q is connected to high power supply 7, and the base of transistor Q2 is connected to low power supply 8 via power supply 9. Further, transistors Q and Q are differentially connected with a common emitter, and this common emitter is connected to the collector of transistor Q2. The collectors of these transistors Q3 are connected to the high-level power supply 7, and the collectors of the transistors Q4 are connected to the base of the transistor Q, and at the same time, are connected to the high-level power supply 7 via the resistor R3. The collector of transistor Q is connected to the high-level power supply 7.
The emitter forms an output terminal 6 and is also connected to a localization power source 8 via a constant current source 3. Regarding the transistors Q6 and Q7 whose emitters are differentially connected together, a resistor R9 is connected to the emitter of the transistor Q6, and a base thereof is connected to a localized source 8 via a power source 10. Collector is transistor Q
4 and the quad of diode D1. Resistor R6 is connected to the emitter voltage of transistor Q7.
is connected, and the base is connected to the stereotactic power source 8 via the variable power source 11. Two diodes D, the collectors of which are connected to the base of the transistor Q and the cathode of the diode D2, and the anodes of each of D2 are connected in common and connected to the high-level power supply 7 via a resistor R3.

Here, the current value of the collector of transistor Q2 is I C2
, the collector current of transistor Q4 is I C42
Further, the voltage between collector and emitter of transistor Q4 is assumed to be VCE.

Next, the operation will be explained.

In operation, the amount of the output current IC2 of the differential amplifying circuit composed of transistors Q, , Q2 flowing to the load resistor R1 is controlled via the differential circuit of transistors Q, , Q, and input terminal 1. The gain from the output terminal 6 to the output terminal 6 is changed. The control of the gain itself is electric! By changing the potential difference between 10 and variable power supply 11 into a current using resistors R9 and R6, converting the current into a voltage using diodes D and D2, and supplying it to the bases of differential amplifier circuits Q, , and Q4, a variable type power supply is generated. Telephone #1
A change of 1 is treated as a change in gain.

In this manner, the conventional gain control amplifier circuit amplifies the input signal using a plurality of stages of differential amplifiers. The gain is changed by variable power supply means provided separately from the differential amplifier for amplification.

7. Problem U to be solved by the invention] In the conventional gain control amplifier circuit described above, when the voltage of the variable power supply 11 is increased in order to increase the gain, the transistor Q4
, the base voltage increases, and as a result, the current IC4 flowing through the load resistor R3 increases. Then, since the voltage effect of the load resistor R3 increases and the operating potential of the output signal decreases, if the current voltage is low, the collector-emitter voltage VC2 of the transistor Q4 cannot be secured, which has the disadvantage that the output signal cannot swing in the negative direction. .

[Means for Solving the Problems] In order to solve the above problems, the gain control amplifier circuit of the present invention includes a circuit that makes the current flowing through the load constant depending on the gain. Specifically, as a first invention, a first transistor whose base is supplied with an input signal;
The first transistor includes a second transistor that forms a differential amplifier, and the emitters of the third and fourth transistors are commonly connected to the collector of one transistor to form the differential amplifier. A load resistor is connected to the collector of the fourth transistor to take out the output, and the base voltages of the third and fourth transistors are changed to generate the third and fourth transistors. In a gain control amplifier circuit that controls gain by changing a collector voltage ratio of a transistor, the fourth transistor includes means for detecting the collector voltage ratio, and a current value corresponding to the detected output flowing into the collector of the fourth transistor. A gain control amplification circuit comprising a flow-in circuit.

In a second invention, the detection circuit is a differential amplifier made up of a plurality of transistors, and in a third invention, the detection circuit is configured to connect the bases of the third and fourth transistors to their respective bases. 5th and 6th
This is a differential amplifier consisting of transistors.

A third aspect of the invention is that the detection circuit includes fifth and sixth transistors in which the bases of the third and fourth transistors are connected to their respective bases.
This is a differential amplifier consisting of transistors.

In a fourth aspect of the invention, the pouring circuit is a current mirror circuit including a plurality of transistors.

A fifth invention has a first transistor whose base is supplied with an input signal, a second transistor forming a differential amplifier with the first transistor, and a third transistor connected to the collector of one transistor. , the emitter of the fourth transistor is connected in common, and has a third and fourth transistor forming a differential amplifier, and a load resistor is connected to the collector of the fourth transistor to take out the output, In the gain 1ViII amplifier circuit, the gain is controlled by changing the base voltage of the third and fourth transistors and changing the collector voltage ratio of the third and fourth transistors.

The current value flowing through the collector of the fifth transistor of the differential amplifier consisting of the fifth and sixth transistors in which the bases of the third and fourth transistors are connected to their respective bases is expressed as A gain control amplification circuit is configured such that the current flows into the collector of the fourth transistor through a current mirror circuit composed of eight transistors.

Excuse example Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows one embodiment of the present invention. This is the conventional example shown in FIG. 2 with the addition of transistors Qa to Q+1 and a constant current source 5. Specifically, the circuit added to the prior art is a transistor Q whose emitters are differentially connected in common. and Q++, and the base of transistor Q+o is coupled to the collector of transistor Q6, and the base of transistor Q11 is coupled to the collector of transistor Q7. The common emitters of the transistors Qlo, Ql□ are connected to a low voltage source 8 via a constant current a5. The collector of the transistor QU is connected to the high-level power supply 7, and the collector of the transistor Q1o is connected to the current mirror circuit i% constituted by the transistors Qa and Q9.
f; Connected to high level; Q7 via Cul. The specific configuration of this current mirror circuit Cul is that the transistors Q, , Q, have a common base, each emitter is connected to the high-level power supply 7, and the collector of the transistor Q9 is connected to the common base. It is also connected to the collectors of transistors Q and o. The collector of the transistor Q8 of such a current mirror circuit is connected to the top and bottom of the transistor Q4. Here, the current flowing through the constant current a5 is assumed to be 14.

In operation, the bases of the differential amplification circuits made up of transistors Q1 and Q1 are connected to transistors Q3 and
By connecting to the base of Q4, transistors Q, ,Q
, is detected at the bases of transistors Q, 0, Q l 1, and the current mirror circuit #! of transistors Qa, Q is detected at the collector of transistor Q +o. c.
By flowing Al into the collector of the transistor Q4, the voltage drop across the load resistor R3 is reduced. As a result, the current values of constant current sources 2 and 5 are 11.1. If is set to an appropriate value considering the power supply voltage and output amplitude, the output amplitude can be increased.

That is, even if the gain of this gain control amplifier circuit is increased by increasing the voltage of the variable power supply 1, the change in the base potential of the transistors Q4 and Q3 will be compensated for by the difference in the differentially connected transistor Q10. Detected by Q I
By being supplied to the collector of transistor Q4, the collector potential of transistor Q4 does not drop.

Note that the normal amplification operation is performed in the same manner as in the conventional technology.

:, Effects of the Invention As explained above, the present invention has the effect that the output amplitude can be increased because the output DC level is kept constant by keeping the current flowing through the load constant according to the gain.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention. Figure 2 is a conventional circuit diagram. 1... Input terminal 2-5... Low current source 6... Output terminal 7... High level power supply 8... Localization power supply R3
...Load resistance Cul...Current mirror circuit 11...Variable power supply IC4...Flow through the collector of the fourth transistor Q1
...first transistor Q2...second transistor Q, ...third transistor Q4...fourth transistor Q, ...seventh transistor Q, ...eighth transistor Q ,. ...Fifth transistor Ql, ...Sixth transistor Cul...Current mirror circuit Q10 and Qll...Detection means Q8 and Q9...Inflow circuit Fig. 1

Claims (5)

[Claims] (1) A first transistor whose base is supplied with an input signal, a second transistor forming a differential amplifier with the first transistor, and third and fourth transistors connected to the collector of one transistor. The emitters of the transistors are connected in common to form a differential amplifier, and a load resistor is connected to the collector of the fourth transistor to take out the output. , a gain control amplification circuit that controls the gain by changing the base voltage of the fourth transistor and changing the collector voltage ratio of the third and fourth transistors, a detection means for detecting the collector voltage ratio; and a flow circuit that flows a current value corresponding to the detected output into the collector of the fourth transistor. (2) The gain control amplifier circuit according to claim 1, wherein the detection circuit is a differential amplifier comprising a plurality of transistors. (3) The gain control according to claim 1 or 2, wherein the detection circuit is a differential amplifier comprising fifth and sixth transistors each having a base connected to the base of the third and fourth transistors. Widening circuit. (4) The gain control amplification circuit according to claim 1, wherein the inflow circuit is a current mirror circuit made up of a plurality of transistors. (5) A first transistor whose base is supplied with an input signal, a second transistor forming a differential amplifier with the first transistor, and third and fourth transistors connected to the collector of one transistor. The emitters of the transistors are connected in common to form a differential amplifier, and a load resistor is connected to the collector of the fourth transistor to take out the output. , a gain control amplifier circuit that controls the gain by changing the base voltage of the fourth transistor and changing the collector voltage ratio of the third and fourth transistors, wherein the bases of the third and fourth transistors are The current value flowing to the collector of the fifth transistor of the differential amplifier, which is made up of the fifth and sixth transistors connected to the respective bases, is passed through the current mirror circuit made up of the seventh and eighth transistors. A gain control amplification circuit configured to flow into the collector of the fourth transistor.