JPH0464801U - - Google Patents

Info

Publication number
JPH0464801U
JPH0464801U JP10640590U JP10640590U JPH0464801U JP H0464801 U JPH0464801 U JP H0464801U JP 10640590 U JP10640590 U JP 10640590U JP 10640590 U JP10640590 U JP 10640590U JP H0464801 U JPH0464801 U JP H0464801U
Authority
JP
Japan
Prior art keywords
bias
high frequency
frequency package
line
notch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10640590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10640590U priority Critical patent/JPH0464801U/ja
Publication of JPH0464801U publication Critical patent/JPH0464801U/ja
Pending legal-status Critical Current

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  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図、第2図はこの考案の一実施例による高
周波用パツケージを示す断面図と平面図、第3図
、第4図はこの考案の他の実施例による高周波パ
ツケージを示す断面図と平面図、第5図、第6図
は従来の高周波パツケージを示す断面図と平面図
である。 図中、1はパツケージのベース部、1aは底部
切欠き部、1bは貫通部、4はMMIC、7はR
F信号入力端子、8はRF出力端子、9はDCバ
イアス印加端子、10はDCバイアス用多層基板
、11はRF線路用基板である。なお、図中同一
符号は同一又は相当部分を示す。
1 and 2 are a sectional view and a plan view showing a high frequency package according to one embodiment of this invention, and FIGS. 3 and 4 are a sectional view and a plan view showing a high frequency package according to another embodiment of this invention. 5 and 6 are a sectional view and a plan view showing a conventional high frequency package. In the figure, 1 is the base part of the package, 1a is the bottom notch, 1b is the through part, 4 is the MMIC, and 7 is the R
An F signal input terminal, 8 an RF output terminal, 9 a DC bias application terminal, 10 a multilayer substrate for DC bias, and 11 an RF line substrate. Note that the same reference numerals in the figures indicate the same or equivalent parts.

補正 平3.10.9 実用新案登録請求の範囲を次のように補正する
Amendment 3/10/9 The scope of claims for utility model registration is amended as follows.

【実用新案登録請求の範囲】 RF信号入力端子より入力したRF信号がMM
ICを介してRF入力端子より出力されるととも
に、DCバイアス印加端子より入力されたMMI
C制御信号によりMMICを制御する高周波用パ
ツケージにおいて、高周波パツケージの底部に
切欠き部を形成し、この切欠き部にDCバイアス
回路用多層基板を配置し、DCバイアス線路をベ
ース下部を通すことにより、RF線路とDCバイ
アス線路がパツケージの内部で交わらないように
したことを特徴とする高周波用パツケージ。
[Scope of claim for utility model registration] If the RF signal input from the RF signal input terminal is MM
MMI output from the RF input terminal via the IC and input from the DC bias application terminal
In a high-frequency package that controls an MMIC using a C control signal, a notch is formed at the bottom of the high -frequency package, a multilayer substrate for a DC bias circuit is placed in the notch, and a DC bias line is passed through the bottom of the base. A high-frequency package characterized in that the RF line and the DC bias line do not intersect inside the package.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] RF信号入力端子より入力したRF信号がMM
ICを介してRF出力端子より出力されるととも
に、DCバイアス印加端子より入力されたMMI
C制御信号によりMMICを制御する高周波用パ
ツケージにおいて、高周波パツケージの底部に切
欠き部を形成し、この切欠き部にDCバイアス回
路用多層基板を配置し、DCバイアス線路をベー
ス下部を通すことにより、RF線路とDCバイア
ス線路がパツケージの内部で交わらないようにし
たことを特徴とする高周波用パツケージ。
The RF signal input from the RF signal input terminal is MM
MMI output from the RF output terminal via the IC and input from the DC bias application terminal
In a high frequency package that controls an MMIC using a C control signal, a notch is formed at the bottom of the high frequency package, a multilayer substrate for a DC bias circuit is placed in this notch, and the DC bias line is passed through the bottom of the base. , a high frequency package characterized in that the RF line and the DC bias line do not intersect inside the package.
JP10640590U 1990-10-09 1990-10-09 Pending JPH0464801U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10640590U JPH0464801U (en) 1990-10-09 1990-10-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10640590U JPH0464801U (en) 1990-10-09 1990-10-09

Publications (1)

Publication Number Publication Date
JPH0464801U true JPH0464801U (en) 1992-06-04

Family

ID=31852481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10640590U Pending JPH0464801U (en) 1990-10-09 1990-10-09

Country Status (1)

Country Link
JP (1) JPH0464801U (en)

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