JPH0486943U - - Google Patents

Description

[Brief explanation of the drawing]

1 and 2 are diagrams showing an embodiment of this invention, in which FIG. 1 is a configuration diagram of an output pattern memory and an emergency processing memory, FIG. 2 is a diagram showing the state of registered patterns, and FIG. 3 is a diagram showing an embodiment of this invention. 1 is a diagram showing a conventional output control circuit. 1 is a computer, 2 is a data bus, 3 is an address bus, 4 is a write signal, 5a is an output circuit, 6 is an address decoder, 8 is an output protection circuit, 11 is an output pattern memory, 12 is a write control signal, 13
14 is a gate circuit, 14 is a latch signal, 15 is a main memory, 17 is an emergency processing memory, and 18 is a switching circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Scope of utility model registration request] A computer that performs calculations according to the program execution procedure, a main memory that stores the program, an output circuit that outputs logical operation results to an external control device for use in combination with multiple control devices, and combinatorial logic that can output an output pattern memory that registers data in advance and determines whether the output combinational logic data is registered data; an address decoder that selects an output circuit and an output pattern memory according to address information output from the computer; The combinational logic data output from the computer is judged by the output pattern memory, and if it is registered, the gate circuit transfers the write signal from the computer to the output circuit, and if it is not registered, it prohibits the write signal. , an emergency processing memory that outputs an emergency processing program to the computer when the judgment result of the output pattern memory indicates that it is not registered, and an emergency processing memory that outputs the emergency processing program to the computer when the judgment result of the output pattern memory shows that it is not registered. It consists of a switching circuit that switches from the main memory to the emergency processing memory, and when combinatorial logic data is written from the computer to the output circuit, it is first checked in the output pattern memory to see if it is a registered pattern, and if it is a registered pattern. outputs an output enable signal from the output pattern memory to the gate circuit and transfers the write signal to the output circuit, and if it is not a registered pattern, outputs a write signal prohibition signal from the output pattern memory to the gate circuit and sends it to the computer. An output control circuit characterized by switching program transfer from main memory to emergency processing memory.