JPH06503445A - ツインタブ形成方法 - Google Patents

ツインタブ形成方法

Info

Publication number: JPH06503445A
Authority: JP; Japan
Prior art keywords: substrate; oxide layer; conductivity type; thin oxide; impurity
Prior art date: 1990-12-12
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

JP4501624A

Other languages

English (en)

Japanese (ja)

Inventor

ヒュート、ピエール

Original Assignee

ミテル・コーポレイション

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-12-12

Filing date

1991-12-11

Publication date

1994-04-14

1991-12-11 Application filed by ミテル・コーポレイション filed Critical ミテル・コーポレイション

1994-04-14 Publication of JPH06503445A publication Critical patent/JPH06503445A/ja

Status Pending legal-status Critical Current

Links

238000000034 method Methods 0.000 title claims description 39
230000015572 biosynthetic process Effects 0.000 title description 4
239000000758 substrate Substances 0.000 claims description 48
238000005468 ion implantation Methods 0.000 claims description 23
239000012535 impurity Substances 0.000 claims description 20
229910052710 silicon Inorganic materials 0.000 claims description 18
239000010703 silicon Substances 0.000 claims description 18
XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 17
238000005530 etching Methods 0.000 claims description 17
238000002513 implantation Methods 0.000 claims description 10
230000003647 oxidation Effects 0.000 claims description 8
238000007254 oxidation reaction Methods 0.000 claims description 8
239000004065 semiconductor Substances 0.000 claims description 5
238000004519 manufacturing process Methods 0.000 claims description 2
235000012431 wafers Nutrition 0.000 description 18
VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
229910052796 boron Inorganic materials 0.000 description 13
ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 11
229920002120 photoresistant polymer Polymers 0.000 description 10
239000007943 implant Substances 0.000 description 8
238000007796 conventional method Methods 0.000 description 7
238000009792 diffusion process Methods 0.000 description 7
150000004767 nitrides Chemical class 0.000 description 7
150000002500 ions Chemical class 0.000 description 6
229910052698 phosphorus Inorganic materials 0.000 description 6
239000011574 phosphorus Substances 0.000 description 6
235000012239 silicon dioxide Nutrition 0.000 description 6
239000000377 silicon dioxide Substances 0.000 description 6
OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
229910052581 Si3N4 Inorganic materials 0.000 description 4
239000013078 crystal Substances 0.000 description 4
230000007547 defect Effects 0.000 description 4
-1 phosphorus ions Chemical class 0.000 description 4
HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
238000011161 development Methods 0.000 description 3
238000002347 injection Methods 0.000 description 3
239000007924 injection Substances 0.000 description 3
RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 2
239000002253 acid Substances 0.000 description 2
239000002019 doping agent Substances 0.000 description 2
230000000873 masking effect Effects 0.000 description 2
238000005259 measurement Methods 0.000 description 2
238000004088 simulation Methods 0.000 description 2
101100163833 Arabidopsis thaliana ARP6 gene Proteins 0.000 description 1
241000257465 Echinoidea Species 0.000 description 1
101150034459 Parpbp gene Proteins 0.000 description 1
229920004482 WACKER® Polymers 0.000 description 1
230000000903 blocking effect Effects 0.000 description 1
239000003990 capacitor Substances 0.000 description 1
230000001010 compromised effect Effects 0.000 description 1
238000011109 contamination Methods 0.000 description 1
238000002474 experimental method Methods 0.000 description 1
238000011835 investigation Methods 0.000 description 1
210000003127 knee Anatomy 0.000 description 1
238000013507 mapping Methods 0.000 description 1
239000000463 material Substances 0.000 description 1
238000012544 monitoring process Methods 0.000 description 1
230000020477 pH reduction Effects 0.000 description 1
238000005498 polishing Methods 0.000 description 1
229920001296 polysiloxane Polymers 0.000 description 1
238000012545 processing Methods 0.000 description 1
239000000523 sample Substances 0.000 description 1
150000003376 silicon Chemical class 0.000 description 1
229910052814 silicon oxide Inorganic materials 0.000 description 1
238000012360 testing method Methods 0.000 description 1
230000007704 transition Effects 0.000 description 1
235000021419 vinegar Nutrition 0.000 description 1
239000000052 vinegar Substances 0.000 description 1

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0191—Manufacturing their doped wells
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub

Landscapes

Element Separation (AREA)
Apparatuses And Processes For Manufacturing Resistors (AREA)
Thermistors And Varistors (AREA)
Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

JP4501624A 1990-12-12 1991-12-11 ツインタブ形成方法 Pending JPH06503445A (ja)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
CA002032073A CA2032073A1 (fr)	1990-12-12	1990-12-12	Methode de fabrication a deux cuves
CA2,032,073		1990-12-12
PCT/CA1991/000441 WO1992010851A1 (fr)	1990-12-12	1991-12-11	Procede de fabrication de caissons jumeles

Publications (1)

Publication Number	Publication Date
JPH06503445A true JPH06503445A (ja)	1994-04-14

Family

ID=4146636

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP4501624A Pending JPH06503445A (ja)	1990-12-12	1991-12-11	ツインタブ形成方法

Country Status (5)

Country	Link
EP (1)	EP0561909A1 (fr)
JP (1)	JPH06503445A (fr)
KR (1)	KR930703698A (fr)
CA (1)	CA2032073A1 (fr)
WO (1)	WO1992010851A1 (fr)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4435896A (en) *	1981-12-07	1984-03-13	Bell Telephone Laboratories, Incorporated	Method for fabricating complementary field effect transistor devices
DE3330851A1 (de) *	1983-08-26	1985-03-14	Siemens AG, 1000 Berlin und 8000 München	Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen
US4554726A (en) *	1984-04-17	1985-11-26	At&T Bell Laboratories	CMOS Integrated circuit technology utilizing dual implantation of slow and fast diffusing donor ions to form the n-well
US4558508A (en) *	1984-10-15	1985-12-17	International Business Machines Corporation	Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step
JPS6197859A (ja) *	1984-10-18	1986-05-16	Matsushita Electronics Corp	相補型ｍｏｓ集積回路の製造方法

1990
- 1990-12-12 CA CA002032073A patent/CA2032073A1/fr not_active Abandoned
1991
- 1991-12-11 WO PCT/CA1991/000441 patent/WO1992010851A1/fr not_active Ceased
- 1991-12-11 JP JP4501624A patent/JPH06503445A/ja active Pending
- 1991-12-11 KR KR1019930701761A patent/KR930703698A/ko not_active Abandoned
- 1991-12-11 EP EP92900803A patent/EP0561909A1/fr not_active Ceased

Also Published As

Publication number	Publication date
CA2032073A1 (fr)	1992-06-13
KR930703698A (ko)	1993-11-30
WO1992010851A1 (fr)	1992-06-25
EP0561909A1 (fr)	1993-09-29

Publication	Publication Date	Title
US4554726A (en)	1985-11-26	CMOS Integrated circuit technology utilizing dual implantation of slow and fast diffusing donor ions to form the n-well
US4382827A (en)	1983-05-10	Silicon nitride S/D ion implant mask in CMOS device fabrication
JP2003523629A (ja)	2003-08-05	Ｃｍｏｓデバイスにおけるストレス誘発転位を除去する方法
US5895252A (en)	1999-04-20	Field oxidation by implanted oxygen (FIMOX)
US5460983A (en)	1995-10-24	Method for forming isolated intra-polycrystalline silicon structures
US4808555A (en)	1989-02-28	Multiple step formation of conductive material layers
US5637529A (en)	1997-06-10	Method for forming element isolation insulating film of semiconductor device
US6261972B1 (en)	2001-07-17	Dual gate oxide process for uniform oxide thickness
EP0417715B1 (fr)	1997-11-12	Procédé de fabrication d'un dispositif semiconducteur
JPH04286154A (ja)	1992-10-12	電界効果トランジスタ及びバイポーラトランジスタ構造の製造方法、集積回路製造方法、半導体デバイス製造方法、及び半導体構造の製造方法
US5001081A (en)	1991-03-19	Method of manufacturing a polysilicon emitter and a polysilicon gate using the same etch of polysilicon on a thin gate oxide
JP3165118B2 (ja)	2001-05-14	半導体装置
US5306939A (en)	1994-04-26	Epitaxial silicon wafers for CMOS integrated circuits
JPH09289323A (ja)	1997-11-04	半導体装置の製造方法
JPH0312785B2 (fr)	1991-02-21
EP0219243A2 (fr)	1987-04-22	Procédé pour la fabrication d'un transistor bipolaire
US20050277262A1 (en)	2005-12-15	Method for manufacturing isolation structures in a semiconductor device
JPH06503445A (ja)	1994-04-14	ツインタブ形成方法
US6069059A (en)	2000-05-30	Well-drive anneal technique using preplacement of nitride films for enhanced field isolation
JPS60149149A (ja)	1985-08-06	半導体装置の製造方法
EP0111097B1 (fr)	1987-05-27	Procédé pour fabriquer des dispositifs à semi-conducteur ayant un diélectrique de champ épais et un interrupteur de canal autoaligné
JP2743451B2 (ja)	1998-04-22	半導体装置の製造方法
JP3182887B2 (ja)	2001-07-03	半導体装置の製造方法
JPS60226174A (ja)	1985-11-11	金属硅化物の形成方法
JPH04252032A (ja)	1992-09-08	Ｎウエルスチーム酸化工程を省略し、ブランケットｐウエル打ち込み工程によりシリコン基板上にｎウエルおよびｐウエルを形成させる方法