JPH11195704A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JPH11195704A
JPH11195704A JP10000019A JP1998A JPH11195704A JP H11195704 A JPH11195704 A JP H11195704A JP 10000019 A JP10000019 A JP 10000019A JP 1998 A JP1998 A JP 1998A JP H11195704 A JPH11195704 A JP H11195704A
Authority
JP
Japan
Prior art keywords
gate electrode
semiconductor device
interlayer insulating
contact hole
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10000019A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11195704A5 (2
Inventor
Atsushi Maeda
敦 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10000019A priority Critical patent/JPH11195704A/ja
Priority to US09/111,882 priority patent/US6060765A/en
Publication of JPH11195704A publication Critical patent/JPH11195704A/ja
Publication of JPH11195704A5 publication Critical patent/JPH11195704A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/0698—Local interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP10000019A 1998-01-05 1998-01-05 半導体装置およびその製造方法 Pending JPH11195704A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10000019A JPH11195704A (ja) 1998-01-05 1998-01-05 半導体装置およびその製造方法
US09/111,882 US6060765A (en) 1998-01-05 1998-07-08 Semiconductor device and a method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10000019A JPH11195704A (ja) 1998-01-05 1998-01-05 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JPH11195704A true JPH11195704A (ja) 1999-07-21
JPH11195704A5 JPH11195704A5 (2) 2005-08-04

Family

ID=11462709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10000019A Pending JPH11195704A (ja) 1998-01-05 1998-01-05 半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US6060765A (2)
JP (1) JPH11195704A (2)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596899B1 (ko) * 1999-12-30 2006-07-04 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US7557408B2 (en) 2006-08-03 2009-07-07 Nec Electronics Corporation Semiconductor device and method of manufacturing the same

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3441330B2 (ja) * 1997-02-28 2003-09-02 株式会社東芝 半導体装置及びその製造方法
US6274292B1 (en) * 1998-02-25 2001-08-14 Micron Technology, Inc. Semiconductor processing methods
US7804115B2 (en) * 1998-02-25 2010-09-28 Micron Technology, Inc. Semiconductor constructions having antireflective portions
US6281100B1 (en) * 1998-09-03 2001-08-28 Micron Technology, Inc. Semiconductor processing methods
US6268282B1 (en) 1998-09-03 2001-07-31 Micron Technology, Inc. Semiconductor processing methods of forming and utilizing antireflective material layers, and methods of forming transistor gate stacks
US6828683B2 (en) * 1998-12-23 2004-12-07 Micron Technology, Inc. Semiconductor devices, and semiconductor processing methods
US7235499B1 (en) * 1999-01-20 2007-06-26 Micron Technology, Inc. Semiconductor processing methods
US6191017B1 (en) * 1999-04-22 2001-02-20 Lucent Technologies, Inc. Method of forming a multi-layered dual-polysilicon structure
US7067414B1 (en) 1999-09-01 2006-06-27 Micron Technology, Inc. Low k interlevel dielectric layer fabrication methods
US6440860B1 (en) * 2000-01-18 2002-08-27 Micron Technology, Inc. Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
JP2004228425A (ja) * 2003-01-24 2004-08-12 Renesas Technology Corp Ｃｍｏｓイメージセンサの製造方法
KR100553682B1 (ko) * 2003-03-07 2006-02-24 삼성전자주식회사 게이트 전극을 갖는 반도체 소자 및 그 형성방법
CN1532943B (zh) * 2003-03-18 2011-11-23 松下电器产业株式会社 碳化硅半导体器件及其制造方法
US7875913B2 (en) * 2008-05-30 2011-01-25 Omnivision Technologies, Inc. Transistor with contact over gate active area

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04109654A (ja) * 1990-08-29 1992-04-10 Nippon Steel Corp 半導体装置及びその製造方法
JPH07135183A (ja) * 1993-11-09 1995-05-23 Hitachi Ltd 薄膜の加工方法
JP3381117B2 (ja) * 1995-05-29 2003-02-24 ソニー株式会社 半導体装置の製造方法
JPH097970A (ja) * 1995-06-21 1997-01-10 Sanyo Electric Co Ltd 半導体装置の製造方法
US5631484A (en) * 1995-12-26 1997-05-20 Motorola, Inc. Method of manufacturing a semiconductor device and termination structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596899B1 (ko) * 1999-12-30 2006-07-04 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US7557408B2 (en) 2006-08-03 2009-07-07 Nec Electronics Corporation Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
US6060765A (en) 2000-05-09

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