JPS5228263A - Process of face bonding of flip tip - Google Patents

Process of face bonding of flip tip

Info

Publication number
JPS5228263A
JPS5228263A JP50104401A JP10440175A JPS5228263A JP S5228263 A JPS5228263 A JP S5228263A JP 50104401 A JP50104401 A JP 50104401A JP 10440175 A JP10440175 A JP 10440175A JP S5228263 A JPS5228263 A JP S5228263A
Authority
JP
Japan
Prior art keywords
face bonding
flip tip
flip
tip
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50104401A
Other languages
Japanese (ja)
Other versions
JPS5953708B2 (en
Inventor
Akihiro Sawamura
Teruo Esumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP50104401A priority Critical patent/JPS5953708B2/en
Publication of JPS5228263A publication Critical patent/JPS5228263A/en
Publication of JPS5953708B2 publication Critical patent/JPS5953708B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To perform reliable reflow bonding by forming electrode bump by using noncrystalline solder of PbSnAg with specified composition ratio.
COPYRIGHT: (C)1977,JPO&Japio
JP50104401A 1975-08-28 1975-08-28 Flip chip face bonding method Expired JPS5953708B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50104401A JPS5953708B2 (en) 1975-08-28 1975-08-28 Flip chip face bonding method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50104401A JPS5953708B2 (en) 1975-08-28 1975-08-28 Flip chip face bonding method

Publications (2)

Publication Number Publication Date
JPS5228263A true JPS5228263A (en) 1977-03-03
JPS5953708B2 JPS5953708B2 (en) 1984-12-26

Family

ID=14379686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50104401A Expired JPS5953708B2 (en) 1975-08-28 1975-08-28 Flip chip face bonding method

Country Status (1)

Country Link
JP (1) JPS5953708B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115338A (en) * 1984-06-29 1986-01-23 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Method of coupling input/output pins with dielectric substrate
JPH01274491A (en) * 1988-04-26 1989-11-02 Aiwa Co Ltd Substrate device using non-eutectic solder
JPH01274492A (en) * 1988-04-26 1989-11-02 Aiwa Co Ltd Manufacture of substrate device using non-eutectic solder
JP2009158490A (en) * 2009-03-16 2009-07-16 Sony Chemical & Information Device Corp Protection element

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6115338A (en) * 1984-06-29 1986-01-23 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Method of coupling input/output pins with dielectric substrate
JPH01274491A (en) * 1988-04-26 1989-11-02 Aiwa Co Ltd Substrate device using non-eutectic solder
JPH01274492A (en) * 1988-04-26 1989-11-02 Aiwa Co Ltd Manufacture of substrate device using non-eutectic solder
JP2009158490A (en) * 2009-03-16 2009-07-16 Sony Chemical & Information Device Corp Protection element

Also Published As

Publication number Publication date
JPS5953708B2 (en) 1984-12-26

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