JPS5268366A - Solder vamp formation onto semiconductor substrate - Google Patents
Solder vamp formation onto semiconductor substrateInfo
- Publication number
- JPS5268366A JPS5268366A JP50143965A JP14396575A JPS5268366A JP S5268366 A JPS5268366 A JP S5268366A JP 50143965 A JP50143965 A JP 50143965A JP 14396575 A JP14396575 A JP 14396575A JP S5268366 A JPS5268366 A JP S5268366A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- solder
- onto semiconductor
- formation onto
- vamp formation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
PURPOSE: When solder vamp is formed at electrode section on semiconductor substrate, the hole of metal mask is made into oval shape instead of round shape in the direction where no effect is given to adjacent electrodes. In this way, a sufficient solder amount can be secured.
COPYRIGHT: (C)1977,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50143965A JPS5935178B2 (en) | 1975-12-05 | 1975-12-05 | Method of forming solder bumps on electrodes on semiconductor substrates |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50143965A JPS5935178B2 (en) | 1975-12-05 | 1975-12-05 | Method of forming solder bumps on electrodes on semiconductor substrates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5268366A true JPS5268366A (en) | 1977-06-07 |
| JPS5935178B2 JPS5935178B2 (en) | 1984-08-27 |
Family
ID=15351161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50143965A Expired JPS5935178B2 (en) | 1975-12-05 | 1975-12-05 | Method of forming solder bumps on electrodes on semiconductor substrates |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5935178B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003163232A (en) * | 2002-11-21 | 2003-06-06 | Fujitsu Ltd | Method of forming spare solder |
| US7378296B2 (en) | 2003-02-25 | 2008-05-27 | Kyocera Corporation | Print mask and method of manufacturing electronic components using the same |
-
1975
- 1975-12-05 JP JP50143965A patent/JPS5935178B2/en not_active Expired
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003163232A (en) * | 2002-11-21 | 2003-06-06 | Fujitsu Ltd | Method of forming spare solder |
| US7378296B2 (en) | 2003-02-25 | 2008-05-27 | Kyocera Corporation | Print mask and method of manufacturing electronic components using the same |
| US7638420B2 (en) | 2003-02-25 | 2009-12-29 | Kyocera Corporation | Print mask and method of manufacturing electronic components using the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5935178B2 (en) | 1984-08-27 |
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