JPS5578544A - Pelletization of semiconductor wafer - Google Patents

Pelletization of semiconductor wafer

Info

Publication number
JPS5578544A
JPS5578544A JP15254578A JP15254578A JPS5578544A JP S5578544 A JPS5578544 A JP S5578544A JP 15254578 A JP15254578 A JP 15254578A JP 15254578 A JP15254578 A JP 15254578A JP S5578544 A JPS5578544 A JP S5578544A
Authority
JP
Japan
Prior art keywords
wafer
substrate
pelletization
semiconductor wafer
saw
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15254578A
Other languages
Japanese (ja)
Inventor
Hiroshi Yokota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15254578A priority Critical patent/JPS5578544A/en
Publication of JPS5578544A publication Critical patent/JPS5578544A/en
Pending legal-status Critical Current

Links

Landscapes

  • Dicing (AREA)

Abstract

PURPOSE: To use a silicon substrate, when giving cuts to the semiconductor side thereof with a dicing saw for pelletization, for elongating the lifetime of the saw and easily setting cutting depth.
CONSTITUTION: A silicon substrate 1 is heated to 100W120°C and coated with electron wax 2. A semiconductor wafer 3 to be pelletized is adhered to the substrate 1 with wax 2. The substrate 1 and wafer 3 are cooled while pressed for tight adhesion. The wafer 3 is set on a dicing machine and cut with a dicing saw. This cutting is made up to a part of the substrate 1, starting from the surface of the wafer 3, and the wafer 3 is divided into pellets 4.
COPYRIGHT: (C)1980,JPO&Japio
JP15254578A 1978-12-08 1978-12-08 Pelletization of semiconductor wafer Pending JPS5578544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15254578A JPS5578544A (en) 1978-12-08 1978-12-08 Pelletization of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15254578A JPS5578544A (en) 1978-12-08 1978-12-08 Pelletization of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS5578544A true JPS5578544A (en) 1980-06-13

Family

ID=15542794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15254578A Pending JPS5578544A (en) 1978-12-08 1978-12-08 Pelletization of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS5578544A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594043A (en) * 1982-06-30 1984-01-10 Fujitsu Ltd Processing method of semiconductor device
EP0614102A3 (en) * 1993-03-03 1994-11-30 Texas Instruments Inc Integrated circuit fabrication improvements.
US5494549A (en) * 1992-01-08 1996-02-27 Rohm Co., Ltd. Dicing method
JP2007509501A (en) * 2003-10-22 2007-04-12 ノースロップ・グラマン・コーポレーション Sewing process of hard substrate wafer

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594043A (en) * 1982-06-30 1984-01-10 Fujitsu Ltd Processing method of semiconductor device
US5494549A (en) * 1992-01-08 1996-02-27 Rohm Co., Ltd. Dicing method
EP0614102A3 (en) * 1993-03-03 1994-11-30 Texas Instruments Inc Integrated circuit fabrication improvements.
US5622900A (en) * 1993-03-03 1997-04-22 Texas Instruments Incorporated Wafer-like processing after sawing DMDs
JP2007509501A (en) * 2003-10-22 2007-04-12 ノースロップ・グラマン・コーポレーション Sewing process of hard substrate wafer

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