JPS5582541A - Tri-state logic circuit - Google Patents

Tri-state logic circuit

Info

Publication number
JPS5582541A
JPS5582541A JP15611478A JP15611478A JPS5582541A JP S5582541 A JPS5582541 A JP S5582541A JP 15611478 A JP15611478 A JP 15611478A JP 15611478 A JP15611478 A JP 15611478A JP S5582541 A JPS5582541 A JP S5582541A
Authority
JP
Japan
Prior art keywords
input
output
tri
logic circuit
state logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15611478A
Other languages
Japanese (ja)
Inventor
Yasunobu Okano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15611478A priority Critical patent/JPS5582541A/en
Publication of JPS5582541A publication Critical patent/JPS5582541A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0002Multistate logic

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To realize the tri-state logic circuit less in power consumption and easy for design and manufacture, by providing the switching logic gate controlling with the signal in opposite phase and a give period between one input terminal and high potential power supply terminal and reference potential terminals. CONSTITUTION:The switch Sd and resistor RD are connected between the input I and the high potential power supply terminal VDD, and the switch Ss and resistor Rs are connected between the input I and the reference terminal Vss. Further, the input 1 is connected to the two delay circuits 3, 4. The output of the delay circuit 3 and the input I are fed to the AND gate 5 to take the output as OUT1, and the output of the delay circuit 4 and the input I are fed to the OR gate 6 to take the output as OUT2. Further, the switches SD and Ss are controlled mutually with the signal in opposite phase at a certain period to perform switching alternately, then no current flows between VDD-Vss to obtain the tri-state logic circuit.
JP15611478A 1978-12-15 1978-12-15 Tri-state logic circuit Pending JPS5582541A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15611478A JPS5582541A (en) 1978-12-15 1978-12-15 Tri-state logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15611478A JPS5582541A (en) 1978-12-15 1978-12-15 Tri-state logic circuit

Publications (1)

Publication Number Publication Date
JPS5582541A true JPS5582541A (en) 1980-06-21

Family

ID=15620611

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15611478A Pending JPS5582541A (en) 1978-12-15 1978-12-15 Tri-state logic circuit

Country Status (1)

Country Link
JP (1) JPS5582541A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4465944A (en) * 1981-01-19 1984-08-14 Oki Electric Industry Co., Ltd. Three state input circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4465944A (en) * 1981-01-19 1984-08-14 Oki Electric Industry Co., Ltd. Three state input circuits

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