JPS5623765A - Molded type electronic device - Google Patents

Molded type electronic device

Info

Publication number
JPS5623765A
JPS5623765A JP9729579A JP9729579A JPS5623765A JP S5623765 A JPS5623765 A JP S5623765A JP 9729579 A JP9729579 A JP 9729579A JP 9729579 A JP9729579 A JP 9729579A JP S5623765 A JPS5623765 A JP S5623765A
Authority
JP
Japan
Prior art keywords
lead wires
package
electronic device
type electronic
molded type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9729579A
Other languages
Japanese (ja)
Other versions
JPS6216553B2 (en
Inventor
Kazuo Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9729579A priority Critical patent/JPS5623765A/en
Publication of JPS5623765A publication Critical patent/JPS5623765A/en
Publication of JPS6216553B2 publication Critical patent/JPS6216553B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce an interval space between lead wires and a package in a molded type electronic device by forming a hole at the portion passing the lead wires from the package. CONSTITUTION:A hole 3 is perforated at the lead wires 2 over the outer surface of a package 1. Thus, it increases the resin self-clamping strength and decreases the cross area of the portion passing the resin with the lead wires to largely reduce the interval between the package and the lead wires. Accordingly, it can improve a moisture resistance reliability.
JP9729579A 1979-08-01 1979-08-01 Molded type electronic device Granted JPS5623765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9729579A JPS5623765A (en) 1979-08-01 1979-08-01 Molded type electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9729579A JPS5623765A (en) 1979-08-01 1979-08-01 Molded type electronic device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63028666A Division JPS63211659A (en) 1988-02-12 1988-02-12 Manufacture of resin-molded semiconductor device

Publications (2)

Publication Number Publication Date
JPS5623765A true JPS5623765A (en) 1981-03-06
JPS6216553B2 JPS6216553B2 (en) 1987-04-13

Family

ID=14188499

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9729579A Granted JPS5623765A (en) 1979-08-01 1979-08-01 Molded type electronic device

Country Status (1)

Country Link
JP (1) JPS5623765A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842246A (en) * 1981-09-07 1983-03-11 Toshiba Corp Semiconductor device
JPS5845681A (en) * 1981-09-07 1983-03-16 Toshiba Corp Memory system
JPS59119751A (en) * 1982-12-25 1984-07-11 Rohm Co Ltd Semiconductor device
JPS59103446U (en) * 1982-12-28 1984-07-12 富士通株式会社 semiconductor equipment
JPS59147448A (en) * 1983-02-12 1984-08-23 Fujitsu Ltd Lead frame for loading semiconductor element and semiconductor device manufactured by using said lead frame and manufacture thereof
JPS6350136U (en) * 1986-09-19 1988-04-05
US6953054B2 (en) 2003-01-17 2005-10-11 Showa Corporation Relief valve
US7429791B2 (en) 2000-08-31 2008-09-30 Nec Corporation Semiconductor device in a resin sealed package with a radiating plate and manufacturing method thereof
JP2013175597A (en) * 2012-02-24 2013-09-05 Sumitomo Electric Device Innovations Inc Package

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5356545U (en) * 1976-10-15 1978-05-15

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5356545U (en) * 1976-10-15 1978-05-15

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842246A (en) * 1981-09-07 1983-03-11 Toshiba Corp Semiconductor device
JPS5845681A (en) * 1981-09-07 1983-03-16 Toshiba Corp Memory system
JPS59119751A (en) * 1982-12-25 1984-07-11 Rohm Co Ltd Semiconductor device
JPS59103446U (en) * 1982-12-28 1984-07-12 富士通株式会社 semiconductor equipment
JPS59147448A (en) * 1983-02-12 1984-08-23 Fujitsu Ltd Lead frame for loading semiconductor element and semiconductor device manufactured by using said lead frame and manufacture thereof
JPS6350136U (en) * 1986-09-19 1988-04-05
US7429791B2 (en) 2000-08-31 2008-09-30 Nec Corporation Semiconductor device in a resin sealed package with a radiating plate and manufacturing method thereof
US6953054B2 (en) 2003-01-17 2005-10-11 Showa Corporation Relief valve
JP2013175597A (en) * 2012-02-24 2013-09-05 Sumitomo Electric Device Innovations Inc Package

Also Published As

Publication number Publication date
JPS6216553B2 (en) 1987-04-13

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