JPS5636151A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS5636151A
JPS5636151A JP11131979A JP11131979A JPS5636151A JP S5636151 A JPS5636151 A JP S5636151A JP 11131979 A JP11131979 A JP 11131979A JP 11131979 A JP11131979 A JP 11131979A JP S5636151 A JPS5636151 A JP S5636151A
Authority
JP
Japan
Prior art keywords
type impurity
impurity region
substrate
memory
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11131979A
Other languages
Japanese (ja)
Inventor
Kazunori Imaoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11131979A priority Critical patent/JPS5636151A/en
Publication of JPS5636151A publication Critical patent/JPS5636151A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells

Landscapes

  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To form a 1 transistor-1 memory capacitor with large capacity without increasing an element area by a mechanism wherein triple laminated regions by P layers and an layer are made up in a semiconductor memory storage consisting of the memory capacitor. CONSTITUTION:An n type impurity region RM is formed on a p type semiconductor substrate 1, and a p type impurity region RM' is made up in the region RM. The p type impurity region RM' is connected to a power source VSS by a metallic electrode wire 6 such as aluminum, and the substrate 1 is also connected to the power surce VSS. Thus, depletion layers DL, DL' are built up to a p.n junction formed by the substrate 1 and the n type impurity region RM and a p. junction made up by the n type impurity region RM and the p type impurity region RM', and capacity as an equivalent circuit shown in the figure is generated. When these regions are used as memory capacitors, the operation of a memory storage is stabilized because of their large capacity.
JP11131979A 1979-08-31 1979-08-31 Semiconductor memory device Pending JPS5636151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11131979A JPS5636151A (en) 1979-08-31 1979-08-31 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11131979A JPS5636151A (en) 1979-08-31 1979-08-31 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5636151A true JPS5636151A (en) 1981-04-09

Family

ID=14558198

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11131979A Pending JPS5636151A (en) 1979-08-31 1979-08-31 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5636151A (en)

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