JPS5651870A - Manufacture of complementary type mos semiconductor device - Google Patents

Manufacture of complementary type mos semiconductor device

Info

Publication number
JPS5651870A
JPS5651870A JP12803079A JP12803079A JPS5651870A JP S5651870 A JPS5651870 A JP S5651870A JP 12803079 A JP12803079 A JP 12803079A JP 12803079 A JP12803079 A JP 12803079A JP S5651870 A JPS5651870 A JP S5651870A
Authority
JP
Japan
Prior art keywords
regions
films
type
region
channel section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12803079A
Other languages
Japanese (ja)
Inventor
Junichi Ochiai
Hiroyuki Muto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP12803079A priority Critical patent/JPS5651870A/en
Publication of JPS5651870A publication Critical patent/JPS5651870A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce the number of masks and a parasitic capacity between source and drain regions under a gate region by thickening oxide films provided on a semiconductor substrate at the regions except a gate region wherein self-matching gate region formation is permitted. CONSTITUTION:A P<-> type well region 14 is formed on an N type Si substrate by diffusion. An SiO2 film 16 and an Si3N4 film 17 are formed by stacking the films on the whole surface. Next, openings 18 and 19 are bored through the stacking films to form the P<+> type source and drain regions 20 and 21 of a P channel section by diffusion. Furthermore, the P<+> type channel stopping regions 22 and 23 of an N channel section are also formed by locating the regions at the end sections of the region 14. Then, thick oxide films 24 are produced on these regions by thermal treatment to provide gate oxide films 28 and 26 by removing the films 17 and 16. Then N<+> type source and drain regions 29 and 30 of an N channel section contacting with the regions 23 and 22 are formed by diffusion in the region 14 by consisting films 28 and 26 as masks. Furthermore, N<+> type stoppng regions 31 and 32 of a P channel section contacting with the regions 22 and 21 are formed.
JP12803079A 1979-10-05 1979-10-05 Manufacture of complementary type mos semiconductor device Pending JPS5651870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12803079A JPS5651870A (en) 1979-10-05 1979-10-05 Manufacture of complementary type mos semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12803079A JPS5651870A (en) 1979-10-05 1979-10-05 Manufacture of complementary type mos semiconductor device

Publications (1)

Publication Number Publication Date
JPS5651870A true JPS5651870A (en) 1981-05-09

Family

ID=14974760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12803079A Pending JPS5651870A (en) 1979-10-05 1979-10-05 Manufacture of complementary type mos semiconductor device

Country Status (1)

Country Link
JP (1) JPS5651870A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4990983A (en) * 1986-10-31 1991-02-05 Rockwell International Corporation Radiation hardened field oxides for NMOS and CMOS-bulk and process for forming

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940872A (en) * 1972-08-25 1974-04-17
JPS5075771A (en) * 1973-10-31 1975-06-21
JPS5128474A (en) * 1974-09-03 1976-03-10 Matsushita Electric Industrial Co Ltd Isoseigyosochi
JPS5153485A (en) * 1974-11-06 1976-05-11 Hitachi Ltd Mis gatadenkaikokahandotaisochino seizoho
JPS52131483A (en) * 1976-04-28 1977-11-04 Hitachi Ltd Mis-type semiconductor device
JPS53110480A (en) * 1977-03-09 1978-09-27 Nec Corp Insulated gate type semiconductor device of complementary circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940872A (en) * 1972-08-25 1974-04-17
JPS5075771A (en) * 1973-10-31 1975-06-21
JPS5128474A (en) * 1974-09-03 1976-03-10 Matsushita Electric Industrial Co Ltd Isoseigyosochi
JPS5153485A (en) * 1974-11-06 1976-05-11 Hitachi Ltd Mis gatadenkaikokahandotaisochino seizoho
JPS52131483A (en) * 1976-04-28 1977-11-04 Hitachi Ltd Mis-type semiconductor device
JPS53110480A (en) * 1977-03-09 1978-09-27 Nec Corp Insulated gate type semiconductor device of complementary circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4990983A (en) * 1986-10-31 1991-02-05 Rockwell International Corporation Radiation hardened field oxides for NMOS and CMOS-bulk and process for forming

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