JPS5654073A - Manufacture of junction field-effect transistor - Google Patents
Manufacture of junction field-effect transistorInfo
- Publication number
- JPS5654073A JPS5654073A JP12895079A JP12895079A JPS5654073A JP S5654073 A JPS5654073 A JP S5654073A JP 12895079 A JP12895079 A JP 12895079A JP 12895079 A JP12895079 A JP 12895079A JP S5654073 A JPS5654073 A JP S5654073A
- Authority
- JP
- Japan
- Prior art keywords
- type
- region
- layer
- oxidized film
- gate region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/80—FETs having rectifying junction gate electrodes
- H10D30/83—FETs having PN junction gate electrodes
Landscapes
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE:To obtain a deep gate region with a highly concentrated impurities in good reproducibility by a method wherein a gate region of J-FET is formed using a large current ion injecting device. CONSTITUTION:An N<-> type layer 2 is made epitaxial growth on P<-> type Si substrate 1, and injected with P type impurity ions to form P<-> type region 3, which comes into the substrate 1, around the layer 2 with an oxidized film 8 formed on the surface as a mask, and to separate the layer 2 in insular. At this time, then, an opening is formed in a prescribed region of an oxidized film 9 which is formed on the film 8 integrally, and an ion-injection region is formed in the layer 2 exposed by means of a large current ion injecter in which a hot cathode is used. Thereafter, it is treated by annealing at temperatures of 900-1,100 deg.C to obtain a P<+> type gate region 10, the oxidized film 9 on the surface being renewed to 11, and opening being formed, and an N<+> type source contact 5 and a drain contact 6 respectively are diffusion-formed in the layers 2 on both sides of the region 10. With such a construction, a controlling operation can easily be performed and in addition, the scattering of the source-drain currents can also be restrained within + or -15%.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12895079A JPS5654073A (en) | 1979-10-08 | 1979-10-08 | Manufacture of junction field-effect transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12895079A JPS5654073A (en) | 1979-10-08 | 1979-10-08 | Manufacture of junction field-effect transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5654073A true JPS5654073A (en) | 1981-05-13 |
Family
ID=14997409
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12895079A Pending JPS5654073A (en) | 1979-10-08 | 1979-10-08 | Manufacture of junction field-effect transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5654073A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6021392A (en) * | 1983-07-14 | 1985-02-02 | Toyo Kohan Co Ltd | Continuous partial plating roll |
-
1979
- 1979-10-08 JP JP12895079A patent/JPS5654073A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6021392A (en) * | 1983-07-14 | 1985-02-02 | Toyo Kohan Co Ltd | Continuous partial plating roll |
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