JPS5687347A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5687347A JPS5687347A JP16507879A JP16507879A JPS5687347A JP S5687347 A JPS5687347 A JP S5687347A JP 16507879 A JP16507879 A JP 16507879A JP 16507879 A JP16507879 A JP 16507879A JP S5687347 A JPS5687347 A JP S5687347A
- Authority
- JP
- Japan
- Prior art keywords
- pads
- region
- type
- under
- breaking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/482—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes for individual devices provided for in groups H10D8/00 - H10D48/00, e.g. for power transistors
- H10W20/484—Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To reduce the floating capacity and to prevent the breaking of wire of the semiconductor device by a method wherein a semiconductor element is provided in an island region being separated by a P-N junction, the electrode wiring and pads are provided surrounding the island region putting an insulating film therebetween, and insulating films under the pads are formed to be thicker by burying. CONSTITUTION:For example, the N type island region 31 is provided being separated by the P-N junction between a P type substrate 41 and a P<+> type diffusion layer 32, and a P type diffusion gate region 36, an N<+> type source region 34 and a drain region 35 are formed to provide the J FET. The insulating film 33 are formed selectively by burying under the bonding pads 39, 40 of the source and drain. Accordingly the floating capacity generated by the bonding pads can be reduced, and the breaking of the electrode wiring can be eliminated. At this case, the insulating layer under the pads can be formed in a short time on account of the change in quality from the porous layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16507879A JPS5687347A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16507879A JPS5687347A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5687347A true JPS5687347A (en) | 1981-07-15 |
| JPS6234148B2 JPS6234148B2 (en) | 1987-07-24 |
Family
ID=15805445
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16507879A Granted JPS5687347A (en) | 1979-12-18 | 1979-12-18 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5687347A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63142845U (en) * | 1987-03-12 | 1988-09-20 |
-
1979
- 1979-12-18 JP JP16507879A patent/JPS5687347A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63142845U (en) * | 1987-03-12 | 1988-09-20 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6234148B2 (en) | 1987-07-24 |
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