JPS57143826A - Formation of resist pattern on gapped semiconductor substrate - Google Patents

Formation of resist pattern on gapped semiconductor substrate

Info

Publication number
JPS57143826A
JPS57143826A JP56028719A JP2871981A JPS57143826A JP S57143826 A JPS57143826 A JP S57143826A JP 56028719 A JP56028719 A JP 56028719A JP 2871981 A JP2871981 A JP 2871981A JP S57143826 A JPS57143826 A JP S57143826A
Authority
JP
Japan
Prior art keywords
gapped
semiconductor substrate
resist pattern
layer
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56028719A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0314172B2 (cs
Inventor
Tomihiro Nakada
Tatsuya Ikeuchi
Koji Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dai Nippon Printing Co Ltd
Original Assignee
Dai Nippon Printing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dai Nippon Printing Co Ltd filed Critical Dai Nippon Printing Co Ltd
Priority to JP56028719A priority Critical patent/JPS57143826A/ja
Publication of JPS57143826A publication Critical patent/JPS57143826A/ja
Publication of JPH0314172B2 publication Critical patent/JPH0314172B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
  • Electron Beam Exposure (AREA)
JP56028719A 1981-02-28 1981-02-28 Formation of resist pattern on gapped semiconductor substrate Granted JPS57143826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56028719A JPS57143826A (en) 1981-02-28 1981-02-28 Formation of resist pattern on gapped semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56028719A JPS57143826A (en) 1981-02-28 1981-02-28 Formation of resist pattern on gapped semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS57143826A true JPS57143826A (en) 1982-09-06
JPH0314172B2 JPH0314172B2 (cs) 1991-02-26

Family

ID=12256246

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56028719A Granted JPS57143826A (en) 1981-02-28 1981-02-28 Formation of resist pattern on gapped semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS57143826A (cs)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163828A (ja) * 1983-03-09 1984-09-14 Toshiba Corp 微細パタ−ンの形成方法
JPS6097624A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体装置の製造方法
JPS63129622A (ja) * 1986-11-20 1988-06-02 Fujitsu Ltd 半導体装置の製造方法
JPH0396286A (ja) * 1989-09-08 1991-04-22 Nippon Telegr & Teleph Corp <Ntt> パターン化酸化物超伝導膜形成法
JP2016517633A (ja) * 2013-03-14 2016-06-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 蒸着で堆積されたフォトレジスト、及びそのための製造及びリソグラフィシステム
US10788744B2 (en) 2013-03-12 2020-09-29 Applied Materials, Inc. Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59163828A (ja) * 1983-03-09 1984-09-14 Toshiba Corp 微細パタ−ンの形成方法
JPS6097624A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体装置の製造方法
JPS63129622A (ja) * 1986-11-20 1988-06-02 Fujitsu Ltd 半導体装置の製造方法
JPH0396286A (ja) * 1989-09-08 1991-04-22 Nippon Telegr & Teleph Corp <Ntt> パターン化酸化物超伝導膜形成法
US10788744B2 (en) 2013-03-12 2020-09-29 Applied Materials, Inc. Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor
JP2016517633A (ja) * 2013-03-14 2016-06-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 蒸着で堆積されたフォトレジスト、及びそのための製造及びリソグラフィシステム

Also Published As

Publication number Publication date
JPH0314172B2 (cs) 1991-02-26

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