JPS577953A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS577953A
JPS577953A JP8324780A JP8324780A JPS577953A JP S577953 A JPS577953 A JP S577953A JP 8324780 A JP8324780 A JP 8324780A JP 8324780 A JP8324780 A JP 8324780A JP S577953 A JPS577953 A JP S577953A
Authority
JP
Japan
Prior art keywords
semiconductor element
frame body
wires
substrate
slack
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8324780A
Other languages
Japanese (ja)
Inventor
Takeshi Obata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8324780A priority Critical patent/JPS577953A/en
Publication of JPS577953A publication Critical patent/JPS577953A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07502—Connecting or disconnecting of bond wires using an auxiliary member
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/581—Auxiliary members, e.g. flow barriers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent the slack and hanging of a wire by mounting a frame body between a semiconductor element and an external electrode. CONSTITUTION:When destances among the semiconductor element 2 and the external electrodes 3 loaded on a substrate 1 are 3.0mm. or longer, the frame body 6 is mounted on the substrate 1 so as to surround the semiconductor element 2, and grooves are formed on an upper surface of the frame body 6 along the connecting directions of the wires. When the height of the groove sections is made higher than the height of the semiconductor element 2 loaded on the substrate 1, the wires pass in the grooves of the frame body 6 from the electrode terminals of the semiconductor element 2, and are connected to the external electrodes. Accordingly, since the slack and hanging of the wires are removed, the wires do not contact mutually, and can be bonded under excellent conditions.
JP8324780A 1980-06-18 1980-06-18 Semiconductor device Pending JPS577953A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8324780A JPS577953A (en) 1980-06-18 1980-06-18 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8324780A JPS577953A (en) 1980-06-18 1980-06-18 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS577953A true JPS577953A (en) 1982-01-16

Family

ID=13796993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8324780A Pending JPS577953A (en) 1980-06-18 1980-06-18 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS577953A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078606A3 (en) * 1981-11-02 1985-04-24 Texas Instruments Incorporated A semiconductor assembly with wire support
US4771330A (en) * 1987-05-13 1988-09-13 Lsi Logic Corporation Wire bonds and electrical contacts of an integrated circuit device
US5376756A (en) * 1991-12-20 1994-12-27 Vlsi Technology, Inc. Wire support and guide
US5753970A (en) * 1993-06-18 1998-05-19 Lsi Logic Corporation System having semiconductor die mounted in die-receiving area having different shape than die
US5955778A (en) * 1996-10-08 1999-09-21 Nec Corporation Lead frame with notched lead ends

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078606A3 (en) * 1981-11-02 1985-04-24 Texas Instruments Incorporated A semiconductor assembly with wire support
US4771330A (en) * 1987-05-13 1988-09-13 Lsi Logic Corporation Wire bonds and electrical contacts of an integrated circuit device
WO1988009056A1 (en) * 1987-05-13 1988-11-17 Lsi Logic Corporation Wire bonds and electrical contacts of an integrated circuit device
EP0314707B1 (en) * 1987-05-13 1994-10-05 Lsi Logic Corporation Wire bonds and electrical contacts of an integrated circuit device
US5376756A (en) * 1991-12-20 1994-12-27 Vlsi Technology, Inc. Wire support and guide
US5430250A (en) * 1991-12-20 1995-07-04 Vlsi Technology, Inc. Wire support and guide
US5753970A (en) * 1993-06-18 1998-05-19 Lsi Logic Corporation System having semiconductor die mounted in die-receiving area having different shape than die
US5955778A (en) * 1996-10-08 1999-09-21 Nec Corporation Lead frame with notched lead ends

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