JPS5814526A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5814526A
JPS5814526A JP56111868A JP11186881A JPS5814526A JP S5814526 A JPS5814526 A JP S5814526A JP 56111868 A JP56111868 A JP 56111868A JP 11186881 A JP11186881 A JP 11186881A JP S5814526 A JPS5814526 A JP S5814526A
Authority
JP
Japan
Prior art keywords
single crystal
silicon
pad
substrate
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56111868A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0335830B2 (2
Inventor
Junji Sakurai
桜井　潤治
Tsutomu Ogawa
力 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56111868A priority Critical patent/JPS5814526A/ja
Publication of JPS5814526A publication Critical patent/JPS5814526A/ja
Publication of JPH0335830B2 publication Critical patent/JPH0335830B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/412—Deposition of metallic or metal-silicide materials

Landscapes

  • Recrystallisation Techniques (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
JP56111868A 1981-07-17 1981-07-17 半導体装置の製造方法 Granted JPS5814526A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56111868A JPS5814526A (ja) 1981-07-17 1981-07-17 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56111868A JPS5814526A (ja) 1981-07-17 1981-07-17 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5814526A true JPS5814526A (ja) 1983-01-27
JPH0335830B2 JPH0335830B2 (2) 1991-05-29

Family

ID=14572173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56111868A Granted JPS5814526A (ja) 1981-07-17 1981-07-17 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5814526A (2)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179523A (ja) * 1985-02-05 1986-08-12 Agency Of Ind Science & Technol 単結晶薄膜形成方法
US5116768A (en) * 1989-03-20 1992-05-26 Fujitsu Limited Fabrication method of a semiconductor integrated circuit having an SOI device and a bulk semiconductor device on a common semiconductor substrate
JPH08203886A (ja) * 1995-01-11 1996-08-09 Lg Semicon Co Ltd 半導体素子の隔離方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116627A (en) * 1980-02-20 1981-09-12 Chiyou Lsi Gijutsu Kenkyu Kumiai Thin film semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116627A (en) * 1980-02-20 1981-09-12 Chiyou Lsi Gijutsu Kenkyu Kumiai Thin film semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179523A (ja) * 1985-02-05 1986-08-12 Agency Of Ind Science & Technol 単結晶薄膜形成方法
US5116768A (en) * 1989-03-20 1992-05-26 Fujitsu Limited Fabrication method of a semiconductor integrated circuit having an SOI device and a bulk semiconductor device on a common semiconductor substrate
JPH08203886A (ja) * 1995-01-11 1996-08-09 Lg Semicon Co Ltd 半導体素子の隔離方法

Also Published As

Publication number Publication date
JPH0335830B2 (2) 1991-05-29

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