JPS6010334A - 積算方式 - Google Patents
積算方式Info
- Publication number
- JPS6010334A JPS6010334A JP11903283A JP11903283A JPS6010334A JP S6010334 A JPS6010334 A JP S6010334A JP 11903283 A JP11903283 A JP 11903283A JP 11903283 A JP11903283 A JP 11903283A JP S6010334 A JPS6010334 A JP S6010334A
- Authority
- JP
- Japan
- Prior art keywords
- integration
- bit
- output
- input
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/509—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators
- G06F7/5095—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination for multiple operands, e.g. digital integrators word-serial, i.e. with an accumulator-register
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11903283A JPS6010334A (ja) | 1983-06-30 | 1983-06-30 | 積算方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11903283A JPS6010334A (ja) | 1983-06-30 | 1983-06-30 | 積算方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6010334A true JPS6010334A (ja) | 1985-01-19 |
| JPH0156428B2 JPH0156428B2 (2) | 1989-11-30 |
Family
ID=14751282
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11903283A Granted JPS6010334A (ja) | 1983-06-30 | 1983-06-30 | 積算方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6010334A (2) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6398071A (ja) * | 1986-10-14 | 1988-04-28 | Nec Corp | 演算回路 |
| JPS63157269A (ja) * | 1986-12-22 | 1988-06-30 | Nec Corp | 演算回路 |
-
1983
- 1983-06-30 JP JP11903283A patent/JPS6010334A/ja active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6398071A (ja) * | 1986-10-14 | 1988-04-28 | Nec Corp | 演算回路 |
| JPS63157269A (ja) * | 1986-12-22 | 1988-06-30 | Nec Corp | 演算回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0156428B2 (2) | 1989-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US3795864A (en) | Methods and apparatus for generating walsh functions | |
| CN111008003A (zh) | 数据处理器、方法、芯片及电子设备 | |
| US6745219B1 (en) | Arithmetic unit using stochastic data processing | |
| JPS6010334A (ja) | 積算方式 | |
| CN113031915B (zh) | 乘法器、数据处理方法、装置及芯片 | |
| SU1667055A1 (ru) | Устройство дл умножени чисел по модулю | |
| SU1396280A2 (ru) | Преобразователь двоичного кода в двоично-дес тичный код угловых единиц | |
| SU588543A1 (ru) | Устройство дл сложени двоичных чисел | |
| US3310800A (en) | System for converting a decimal fraction of a degree to minutes | |
| SU1513443A1 (ru) | Устройство дл обработки данных | |
| SU1136155A1 (ru) | Устройство дл извлечени квадратного корн | |
| RU1791813C (ru) | Устройство дл делени чисел на константу типа 2 @ + 1 | |
| SU1141406A1 (ru) | Устройство дл возведени в квадрат и извлечени квадратного корн | |
| KR100505471B1 (ko) | 데이터 변환을 이용한 파형 생성방법 | |
| US4141077A (en) | Method for dividing two numbers and device for effecting same | |
| SU466507A1 (ru) | Устройство дл преобразовани правильной двоично-дес тичной дроби в двоичную дробь | |
| SU1005302A1 (ru) | Устройство дл преобразовани напр жени в код системы остаточных классов | |
| SU769520A1 (ru) | Устройство дл управлени вводом- выводом информации | |
| SU974371A1 (ru) | Устройство дл вычислени функций SIN х и coS х | |
| SU1015378A1 (ru) | Устройство дл извлечени квадратного корн | |
| SU1084780A1 (ru) | Преобразователь последовательного двоичного кода в параллельный двоично-дес тичный код | |
| JPS61153771A (ja) | 画像処理装置 | |
| SU962981A1 (ru) | Устройство дл разбраковки изделий | |
| US3614403A (en) | System for converting to a bcd code | |
| JPS5981762A (ja) | 高速フ−リエ変換プロセツサ |