JPS60236268A - 高耐圧mos電界効果型トランジスタ - Google Patents
高耐圧mos電界効果型トランジスタInfo
- Publication number
- JPS60236268A JPS60236268A JP60081211A JP8121185A JPS60236268A JP S60236268 A JPS60236268 A JP S60236268A JP 60081211 A JP60081211 A JP 60081211A JP 8121185 A JP8121185 A JP 8121185A JP S60236268 A JPS60236268 A JP S60236268A
- Authority
- JP
- Japan
- Prior art keywords
- region
- semiconductor region
- semiconductor
- field effect
- effect transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US60679784A | 1984-05-03 | 1984-05-03 | |
| US606797 | 1984-05-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60236268A true JPS60236268A (ja) | 1985-11-25 |
Family
ID=24429500
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60081211A Pending JPS60236268A (ja) | 1984-05-03 | 1985-04-16 | 高耐圧mos電界効果型トランジスタ |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0160183A3 (de) |
| JP (1) | JPS60236268A (de) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63164258A (ja) * | 1986-12-25 | 1988-07-07 | Fujitsu Ltd | 高耐圧入出力回路 |
| JPH02284462A (ja) * | 1989-03-17 | 1990-11-21 | Delco Electron Corp | 単一集積回路チップ上に高電圧及び低電圧cmosトランジスタを形成するためのプロセス |
| JPH03233965A (ja) * | 1990-02-08 | 1991-10-17 | Toshiba Corp | 絶縁ゲート型集積回路 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4801986A (en) * | 1987-04-03 | 1989-01-31 | General Electric Company | Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method |
| US4823176A (en) * | 1987-04-03 | 1989-04-18 | General Electric Company | Vertical double diffused metal oxide semiconductor (VDMOS) device including high voltage junction exhibiting increased safe operating area |
| EP0449858B1 (de) * | 1988-12-23 | 1993-05-05 | Fraunhofer-Gesellschaft Zur Förderung Der Angewandten Forschung E.V. | Hochspannungstransistor-anordnung in cmos-technologie |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4058822A (en) * | 1975-05-30 | 1977-11-15 | Sharp Kabushiki Kaisha | High voltage, low on-resistance diffusion-self-alignment metal oxide semiconductor device and manufacture thereof |
| JPS5368581A (en) * | 1976-12-01 | 1978-06-19 | Hitachi Ltd | Semiconductor device |
| DE3046749C2 (de) * | 1979-12-10 | 1986-01-16 | Sharp K.K., Osaka | MOS-Transistor für hohe Betriebsspannungen |
-
1985
- 1985-03-08 EP EP85102631A patent/EP0160183A3/de not_active Withdrawn
- 1985-04-16 JP JP60081211A patent/JPS60236268A/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63164258A (ja) * | 1986-12-25 | 1988-07-07 | Fujitsu Ltd | 高耐圧入出力回路 |
| JPH02284462A (ja) * | 1989-03-17 | 1990-11-21 | Delco Electron Corp | 単一集積回路チップ上に高電圧及び低電圧cmosトランジスタを形成するためのプロセス |
| JPH03233965A (ja) * | 1990-02-08 | 1991-10-17 | Toshiba Corp | 絶縁ゲート型集積回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0160183A2 (de) | 1985-11-06 |
| EP0160183A3 (de) | 1986-12-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5936278A (en) | Semiconductor on silicon (SOI) transistor with a halo implant | |
| US7553733B2 (en) | Isolated LDMOS IC technology | |
| US7375398B2 (en) | High voltage FET gate structure | |
| JPH02237160A (ja) | 半導体装置 | |
| JP2800702B2 (ja) | 半導体装置 | |
| JPH08107202A (ja) | 横型高耐圧電界効果トランジスタおよびその製造方法 | |
| US20200006489A1 (en) | MOSFET Having Drain Region Formed Between Two Gate Electrodes with Body Contact Region and Source Region Formed in a Double Well Region | |
| JPH01155653A (ja) | 高電圧併合バイポーラ/cmos集積回路 | |
| KR100962233B1 (ko) | 고전압 접합형 전계효과 트랜지스터 | |
| JPS60236268A (ja) | 高耐圧mos電界効果型トランジスタ | |
| US8587055B2 (en) | Integrated circuit using a superjunction semiconductor device | |
| JP3193984B2 (ja) | 高耐圧mosトランジスタ | |
| JPH02138756A (ja) | 半導体装置およびその製造方法 | |
| JPS6112390B2 (de) | ||
| JPS62222676A (ja) | 高耐圧mosトランジスタ | |
| JPS63175463A (ja) | バイmos集積回路の製造方法 | |
| JPS63166257A (ja) | 半導体装置 | |
| JP2900889B2 (ja) | 半導体記憶装置およびその製造方法 | |
| JPS6154660A (ja) | 半導体集積回路装置 | |
| JPS61203679A (ja) | 高耐圧mosトランジスタ | |
| JPH01100969A (ja) | ホットキャリア抑制用深接合非自己整合型トランジスタの適用 | |
| JPS627710B2 (de) | ||
| JPS60154568A (ja) | 半導体装置の製造方法 | |
| JPS60154662A (ja) | Mos型半導体装置 | |
| JPH03151669A (ja) | 半導体装置の製造方法 |