JPS6030538U - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS6030538U
JPS6030538U JP1983122116U JP12211683U JPS6030538U JP S6030538 U JPS6030538 U JP S6030538U JP 1983122116 U JP1983122116 U JP 1983122116U JP 12211683 U JP12211683 U JP 12211683U JP S6030538 U JPS6030538 U JP S6030538U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
semiconductor chip
bonding pad
wire
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983122116U
Other languages
English (en)
Inventor
進 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1983122116U priority Critical patent/JPS6030538U/ja
Publication of JPS6030538U publication Critical patent/JPS6030538U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第１図は従来の半導体装置の要部組立平面図、第２図は
本考案の一実施例の要部組立拡大平面図、第３図は同じ
（他の実施例の要部組立拡大平面図である。 図において１１は半導体チップ、１２は半導体チップ１
１上の接続用ボンデングパッド、１３はワイヤ、１４は
半導体チップ１１上の非接続ボンデングパッド、１５．
１６は識別マークを示す。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体チップ上のボンデングパッドの周辺部に、ワイヤ
    の接続、又は非接続を示す識別マークを設けたことを特
    徴とする半導体装置。
JP1983122116U 1983-08-04 1983-08-04 半導体装置 Pending JPS6030538U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983122116U JPS6030538U (ja) 1983-08-04 1983-08-04 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983122116U JPS6030538U (ja) 1983-08-04 1983-08-04 半導体装置

Publications (1)

Publication Number Publication Date
JPS6030538U true JPS6030538U (ja) 1985-03-01

Family

ID=30279247

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983122116U Pending JPS6030538U (ja) 1983-08-04 1983-08-04 半導体装置

Country Status (1)

Country Link
JP (1) JPS6030538U (ja)

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