JPS6234427U - - Google Patents

Info

Publication number
JPS6234427U
JPS6234427U JP1985125538U JP12553885U JPS6234427U JP S6234427 U JPS6234427 U JP S6234427U JP 1985125538 U JP1985125538 U JP 1985125538U JP 12553885 U JP12553885 U JP 12553885U JP S6234427 U JPS6234427 U JP S6234427U
Authority
JP
Japan
Prior art keywords
depth
semiconductor substrate
wet etching
pattern
alignment mark
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985125538U
Other languages
Japanese (ja)
Other versions
JPH0322903Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985125538U priority Critical patent/JPH0322903Y2/ja
Publication of JPS6234427U publication Critical patent/JPS6234427U/ja
Application granted granted Critical
Publication of JPH0322903Y2 publication Critical patent/JPH0322903Y2/ja
Expired legal-status Critical Current

Links

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a,b,cは本考案の実施例を断面構造
を示したもので第2図a,b、第3図は従来の目
合わせパターンを使用した場合のイオン注入用マ
スク形成法を示したものである。第4図a,b,
cは、目合わせマーク部分の本考案の実施例(第
4図b)と従来例(第4図a,c)の比較を示し
た断面図である。 これらの図において1は半導体基板、2は目合
わせマーク、3は金属(Au)層、4は素子部、
5はPRマスクパターン、6は金属(Au)除去
部、7は金属(Au)マスク部である。
Figures 1a, b, and c show the cross-sectional structure of an embodiment of the present invention, and Figures 2a, b, and 3 show a method for forming an ion implantation mask using a conventional alignment pattern. This is what is shown. Figure 4 a, b,
4c is a sectional view showing a comparison of the alignment mark portion of the embodiment of the present invention (FIG. 4b) and the conventional example (FIGS. 4a and 4c). In these figures, 1 is a semiconductor substrate, 2 is an alignment mark, 3 is a metal (Au) layer, 4 is an element part,
5 is a PR mask pattern, 6 is a metal (Au) removed portion, and 7 is a metal (Au) mask portion.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板表面上に1μmから2μmの厚さの
金属パターンをウエツトエツチングあるいはドラ
イエツチングによつて所望の位置に形成する工程
において用いる目合わせマークを、前記半導体基
板表面にウエツトエツチングにより深さ5000
ű1000Åに堀り込まれたパターンから形成
することを特徴とする半導体プロセス用目合せマ
ーク。
Alignment marks used in the process of forming a metal pattern with a thickness of 1 μm to 2 μm at a desired position on the surface of a semiconductor substrate by wet etching or dry etching are etched to a depth of 5000 mm on the surface of the semiconductor substrate by wet etching.
An alignment mark for semiconductor processing, characterized in that it is formed from a pattern drilled to a depth of ű1000 Å.
JP1985125538U 1985-08-15 1985-08-15 Expired JPH0322903Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985125538U JPH0322903Y2 (en) 1985-08-15 1985-08-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985125538U JPH0322903Y2 (en) 1985-08-15 1985-08-15

Publications (2)

Publication Number Publication Date
JPS6234427U true JPS6234427U (en) 1987-02-28
JPH0322903Y2 JPH0322903Y2 (en) 1991-05-20

Family

ID=31018519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985125538U Expired JPH0322903Y2 (en) 1985-08-15 1985-08-15

Country Status (1)

Country Link
JP (1) JPH0322903Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109817605A (en) * 2018-05-29 2019-05-28 苏州能讯高能半导体有限公司 Semiconductor device and method of making the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109817605A (en) * 2018-05-29 2019-05-28 苏州能讯高能半导体有限公司 Semiconductor device and method of making the same
CN109817605B (en) * 2018-05-29 2025-02-28 苏州能讯高能半导体有限公司 Semiconductor device and method for manufacturing the same

Also Published As

Publication number Publication date
JPH0322903Y2 (en) 1991-05-20

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