JPS63310147A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number: JPS63310147A
Authority: JP; Japan
Prior art keywords: semiconductor device; solder; lead frame; molten solder; lead
Prior art date: 1987-06-12
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

JP14743887A

Other languages

English (en)

Japanese (ja)

Other versions

JPH0533828B2 (de

Inventor

Motoaki Matsuda

元秋松田

Hidemi Matsukuma

松隈　秀実

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

NEC Kyushu Ltd

Original Assignee

NEC Kyushu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1987-06-12

Filing date

1987-06-12

Publication date

1988-12-19

1987-06-12 Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd

1987-06-12 Priority to JP14743887A priority Critical patent/JPS63310147A/ja

1988-12-19 Publication of JPS63310147A publication Critical patent/JPS63310147A/ja

1993-05-20 Publication of JPH0533828B2 publication Critical patent/JPH0533828B2/ja

Status Granted legal-status Critical Current

Links

239000004065 semiconductor Substances 0.000 title claims abstract description 37
238000004519 manufacturing process Methods 0.000 title claims description 7
229910000679 solder Inorganic materials 0.000 claims abstract description 39
238000000034 method Methods 0.000 claims abstract description 11
239000011347 resin Substances 0.000 claims description 3
229920005989 resin Polymers 0.000 claims description 3
238000000465 moulding Methods 0.000 claims description 2
239000000463 material Substances 0.000 abstract description 5
239000011248 coating agent Substances 0.000 description 4
238000000576 coating method Methods 0.000 description 4
238000010586 diagram Methods 0.000 description 2
238000007796 conventional method Methods 0.000 description 1
230000000694 effects Effects 0.000 description 1
238000005516 engineering process Methods 0.000 description 1
238000005476 soldering Methods 0.000 description 1

Landscapes

Lead Frames For Integrated Circuits (AREA)

JP14743887A 1987-06-12 1987-06-12 半導体装置の製造方法 Granted JPS63310147A (ja)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP14743887A JPS63310147A (ja)	1987-06-12	1987-06-12	半導体装置の製造方法

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP14743887A JPS63310147A (ja)	1987-06-12	1987-06-12	半導体装置の製造方法

Publications (2)

Publication Number	Publication Date
JPS63310147A true JPS63310147A (ja)	1988-12-19
JPH0533828B2 JPH0533828B2 (de)	1993-05-20

Family

ID=15430338

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP14743887A Granted JPS63310147A (ja)	1987-06-12	1987-06-12	半導体装置の製造方法

Country Status (1)

Country	Link
JP (1)	JPS63310147A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH05144987A (ja) *	1991-11-20	1993-06-11	Kyocera Corp	半導体装置の製造方法

1987
- 1987-06-12 JP JP14743887A patent/JPS63310147A/ja active Granted

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPH05144987A (ja) *	1991-11-20	1993-06-11	Kyocera Corp	半導体装置の製造方法

Also Published As

Publication number	Publication date
JPH0533828B2 (de)	1993-05-20

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