JPS6368228U - - Google Patents

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Publication number
JPS6368228U
JPS6368228U JP16415786U JP16415786U JPS6368228U JP S6368228 U JPS6368228 U JP S6368228U JP 16415786 U JP16415786 U JP 16415786U JP 16415786 U JP16415786 U JP 16415786U JP S6368228 U JPS6368228 U JP S6368228U
Authority
JP
Japan
Prior art keywords
enhancement type
channel enhancement
drive
type mosfet
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16415786U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16415786U priority Critical patent/JPS6368228U/ja
Publication of JPS6368228U publication Critical patent/JPS6368228U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案による半導体装置の一実施例
を示す回路図、第2図は第1図の動作説明に供す
るパルストランスの入、出力信号の波形図、第3
図および第4図は従来の半導体装置の例を示す回
路図である。 1……nチヤンネルエンハンスメント形パワー
MOSFET、2,3……ドライブ用nチヤンネ
ルエンハンスメント形MOSFET、5,6……
フアーストリカバリーダイオード。
FIG. 1 is a circuit diagram showing an embodiment of a semiconductor device according to this invention, FIG. 2 is a waveform diagram of input and output signals of a pulse transformer to explain the operation of FIG. 1, and FIG.
1 and 4 are circuit diagrams showing examples of conventional semiconductor devices. 1...N-channel enhancement type power MOSFET, 2, 3...N-channel enhancement type MOSFET for drive, 5, 6...
Fast recovery diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] メインのnチヤンネルエンハンスメント形パワ
ーMOSFETのゲートに第1のドライブ用nチ
ヤンネルエンハンスメント形MOSFETのドレ
インと第2のドライブ用nチヤンネルエンハンス
メント形MOSFETのゲートを接続し、前記メ
インのnチヤンネルエンハンスメント形パワーM
OSFETのソースに前記第2のドライブ用nチ
ヤンネルエンハンスメント形MOSFETのドレ
インを接続し、前記第1のドライブ用nチヤンネ
ルエンハンスメント形MOSFETのゲートと前
記第2のドライブ用nチヤンネルエンハンスメン
ト形MOSFETのソースを接続し、かつ前記第
1および第2のドライブ用nチヤンネルエンハン
スメント形MOSFETのそれぞれのドレイン・
ソースに逆並列にフアーストリカバリーダイオー
ドを接続した構成を1ユニツトとして1ユニツト
または組み合わされた複数ユニツトをモールドパ
ツケージ内に収めたことを特徴とする半導体装置
。
The drain of the first drive n-channel enhancement type MOSFET and the gate of the second drive n-channel enhancement type MOSFET are connected to the gate of the main n-channel enhancement type power MOSFET, and the main n-channel enhancement type power M
The drain of the second drive n-channel enhancement type MOSFET is connected to the source of the OSFET, and the gate of the first drive n-channel enhancement type MOSFET is connected to the source of the second drive n-channel enhancement type MOSFET. and the respective drains of the first and second drive n-channel enhancement type MOSFETs.
A semiconductor device characterized in that one unit or a plurality of combined units are housed in a molded package, with a first recovery diode connected in antiparallel to a source as one unit.
JP16415786U 1986-10-23 1986-10-23 Pending JPS6368228U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16415786U JPS6368228U (en) 1986-10-23 1986-10-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16415786U JPS6368228U (en) 1986-10-23 1986-10-23

Publications (1)

Publication Number Publication Date
JPS6368228U true JPS6368228U (en) 1988-05-09

Family

ID=31093015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16415786U Pending JPS6368228U (en) 1986-10-23 1986-10-23

Country Status (1)

Country Link
JP (1) JPS6368228U (en)

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