JPS6433657A - Memory access controller - Google Patents

Memory access controller

Info

Publication number
JPS6433657A
JPS6433657A JP19088587A JP19088587A JPS6433657A JP S6433657 A JPS6433657 A JP S6433657A JP 19088587 A JP19088587 A JP 19088587A JP 19088587 A JP19088587 A JP 19088587A JP S6433657 A JPS6433657 A JP S6433657A
Authority
JP
Japan
Prior art keywords
bus
memory
cpu
access
fast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19088587A
Other languages
English (en)
Other versions
JP2565916B2 (ja
Inventor
Nobutaka Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP19088587A priority Critical patent/JP2565916B2/ja
Publication of JPS6433657A publication Critical patent/JPS6433657A/ja
Priority to US07/689,720 priority patent/US5280589A/en
Application granted granted Critical
Publication of JP2565916B2 publication Critical patent/JP2565916B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285—Halt processor DMA

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP19088587A 1987-07-30 1987-07-30 メモリアクセス制御装置 Expired - Fee Related JP2565916B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP19088587A JP2565916B2 (ja) 1987-07-30 1987-07-30 メモリアクセス制御装置
US07/689,720 US5280589A (en) 1987-07-30 1991-04-22 Memory access control system for use with a relatively small size data processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19088587A JP2565916B2 (ja) 1987-07-30 1987-07-30 メモリアクセス制御装置

Publications (2)

Publication Number Publication Date
JPS6433657A true JPS6433657A (en) 1989-02-03
JP2565916B2 JP2565916B2 (ja) 1996-12-18

Family

ID=16265363

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19088587A Expired - Fee Related JP2565916B2 (ja) 1987-07-30 1987-07-30 メモリアクセス制御装置

Country Status (1)

Country Link
JP (1) JP2565916B2 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341544A (ja) * 1989-07-07 1991-02-22 Hitachi Ltd マルチバスデータ転送制御方式のデータ処理装置
JP2001523360A (ja) * 1994-12-23 2001-11-20 マイクロン・テクノロジー・インコーポレイテッド 複数のデータ経路を有するメイン・メモリ・システム

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341544A (ja) * 1989-07-07 1991-02-22 Hitachi Ltd マルチバスデータ転送制御方式のデータ処理装置
JP2001523360A (ja) * 1994-12-23 2001-11-20 マイクロン・テクノロジー・インコーポレイテッド 複数のデータ経路を有するメイン・メモリ・システム

Also Published As

Publication number Publication date
JP2565916B2 (ja) 1996-12-18

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees