JPS6439764A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6439764A
JPS6439764A JP62197472A JP19747287A JPS6439764A JP S6439764 A JPS6439764 A JP S6439764A JP 62197472 A JP62197472 A JP 62197472A JP 19747287 A JP19747287 A JP 19747287A JP S6439764 A JPS6439764 A JP S6439764A
Authority
JP
Japan
Prior art keywords
suppressing agent
radiation ray
resist
ray suppressing
frame pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62197472A
Other languages
Japanese (ja)
Inventor
Tomoji Onozuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62197472A priority Critical patent/JPS6439764A/en
Publication of JPS6439764A publication Critical patent/JPS6439764A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Memories (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To make it possible to fill a radiation ray suppressing agent into the desired arbitrary shape, and to prevent the generation of the breaking of wire caused by the adhesion of the radiation ray suppressing agent to a bonding wire by a method wherein a frame pattern is formed using the resist surrounding a memory part. CONSTITUTION:A high viscosity resist 4 is coated on the whole surface of the wafer on which a semiconductor functional element is formed. Then, using an exposing device and a developing device, a frame pattern 6 is formed surrounding a circuit part 5 including the region on a memory part. Subsequently, the resist 4 has been baked and hardened in an oven, a radiation ray suppressing agent 7 such as polyimide is filled up in the region surrounded by the frame pattern 6, the radiation ray suppressing agent 7 is scattered and solidified in the oven. Then, when the resist 4 is removed by a stripping device, a film of radiation ray suppressing agent 7 is formed on the main surface of a semiconductor substrate 1.
JP62197472A 1987-08-06 1987-08-06 Manufacture of semiconductor device Pending JPS6439764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62197472A JPS6439764A (en) 1987-08-06 1987-08-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62197472A JPS6439764A (en) 1987-08-06 1987-08-06 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6439764A true JPS6439764A (en) 1989-02-10

Family

ID=16375048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62197472A Pending JPS6439764A (en) 1987-08-06 1987-08-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6439764A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04296029A (en) * 1991-03-26 1992-10-20 Nec Corp Semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04296029A (en) * 1991-03-26 1992-10-20 Nec Corp Semiconductor integrated circuit device

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