JPS6473637A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS6473637A
JPS6473637A JP62231607A JP23160787A JPS6473637A JP S6473637 A JPS6473637 A JP S6473637A JP 62231607 A JP62231607 A JP 62231607A JP 23160787 A JP23160787 A JP 23160787A JP S6473637 A JPS6473637 A JP S6473637A
Authority
JP
Japan
Prior art keywords
wirings
region
integrated circuit
circuit device
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62231607A
Other languages
Japanese (ja)
Inventor
Masatoki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62231607A priority Critical patent/JPS6473637A/en
Publication of JPS6473637A publication Critical patent/JPS6473637A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To shorten the delay time of wirings by so covering at least an electrode of an active element with an insulating film as to pass wirings of first layer on an unused active element in a semiconductor integrated circuit device having a gate array structure. CONSTITUTION:In a semiconductor integrated circuit device, the whole surface of the unused section of many transistor regions 1 on a semiconductor substrate 10 is covered with a low dielectric constant insulating film 3, wirings 4 of a first layer for connecting a first transistor region 1a to a third transistor region 1b can be linearly disposed on a transistor region 1c, and the region 1c becomes a wiring region substantially equal to the original wiring region 5. Accordingly, the electrode leads 2 of the regions 1a, 1b can be connected at the shortest distance by the wirings 4 of the first layer.
JP62231607A 1987-09-14 1987-09-14 Semiconductor integrated circuit device Pending JPS6473637A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62231607A JPS6473637A (en) 1987-09-14 1987-09-14 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62231607A JPS6473637A (en) 1987-09-14 1987-09-14 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6473637A true JPS6473637A (en) 1989-03-17

Family

ID=16926163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62231607A Pending JPS6473637A (en) 1987-09-14 1987-09-14 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6473637A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02209769A (en) * 1989-02-09 1990-08-21 Sony Corp Master-slice type semiconductor integrated circuit device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02209769A (en) * 1989-02-09 1990-08-21 Sony Corp Master-slice type semiconductor integrated circuit device

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