JPS6489557A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6489557A
JPS6489557A JP62247358A JP24735887A JPS6489557A JP S6489557 A JPS6489557 A JP S6489557A JP 62247358 A JP62247358 A JP 62247358A JP 24735887 A JP24735887 A JP 24735887A JP S6489557 A JPS6489557 A JP S6489557A
Authority
JP
Japan
Prior art keywords
channel transistor
region
epitaxial layer
semiconductor substrate
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62247358A
Other languages
Japanese (ja)
Inventor
Hirobumi Mishiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62247358A priority Critical patent/JPS6489557A/en
Priority to KR1019880012646A priority patent/KR890005834A/en
Publication of JPS6489557A publication Critical patent/JPS6489557A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/858—Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To improve the effective area for an internal IC elements to provide additional functions and improve characteristics such as driving capacity by applying power to a semiconductor device through its substrate and epitaxial layer. CONSTITUTION:An epitaxial layer 2 is grown on a heavily-doped semiconductor substrate 1 of low resistivity. A P-channel transistor region 3 and a N-channel transistor region 4 are provided on the epitaxial layer 2. The P-channel transistor is not provided with a pad for high-voltage power supply. Instead, a P<+> region 7, as the source region of the P-channel transistor, is connected with a semiconductor substrate contact 20 via a metal conductor layer 19, so that the P-channel transistor is supplied with a voltage which is the same as the potential at the semiconductor substrate 1.
JP62247358A 1987-09-30 1987-09-30 Semiconductor device Pending JPS6489557A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62247358A JPS6489557A (en) 1987-09-30 1987-09-30 Semiconductor device
KR1019880012646A KR890005834A (en) 1987-09-30 1988-09-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62247358A JPS6489557A (en) 1987-09-30 1987-09-30 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6489557A true JPS6489557A (en) 1989-04-04

Family

ID=17162232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62247358A Pending JPS6489557A (en) 1987-09-30 1987-09-30 Semiconductor device

Country Status (2)

Country Link
JP (1) JPS6489557A (en)
KR (1) KR890005834A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5083179A (en) * 1990-02-27 1992-01-21 Kabushiki Kaisha Toshiba CMOS semiconductor integrated circuit device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60128655A (en) * 1983-12-16 1985-07-09 Hitachi Ltd Semiconductor device
JPS61131476A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd Semiconductor device
JPS61131477A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60128655A (en) * 1983-12-16 1985-07-09 Hitachi Ltd Semiconductor device
JPS61131476A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd Semiconductor device
JPS61131477A (en) * 1984-11-30 1986-06-19 Fujitsu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5083179A (en) * 1990-02-27 1992-01-21 Kabushiki Kaisha Toshiba CMOS semiconductor integrated circuit device

Also Published As

Publication number Publication date
KR890005834A (en) 1989-05-17

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