KR960032575A - 회로 패키지에의 땜납의 선택적 도포를 위한 프로세스 - Google Patents

회로 패키지에의 땜납의 선택적 도포를 위한 프로세스 Download PDF

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KR960032575A
KR960032575A KR1019950061276A KR19950061276A KR960032575A KR 960032575 A KR960032575 A KR 960032575A KR 1019950061276 A KR1019950061276 A KR 1019950061276A KR 19950061276 A KR19950061276 A KR 19950061276A KR 960032575 A KR960032575 A KR 960032575A
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electroplating
solder
conductive layer
solder material
dielectric layer
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KR100225217B1 (ko
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프란시스 카레이 찰스
미카엘 팰론 케니쓰
리스타 마르코비치 보여
올리버 포웰 더글라스
폴 블라삭 그레이
스튜어트 자르 리챠드
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월리엄 티. 엘리스
인터내셔널 비지네스 머신즈 코포레이션
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/08—Electroplating with moving electrolyte e.g. jet electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/241—Reinforcing of the conductive pattern characterised by the electroplating method; means therefor, e.g. baths or apparatus
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3465—Application of solder
    • H05K3/3473—Plating of solder
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/041—Connecting or disconnecting interconnections to or from leadframes, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/054—Continuous temporary metal layer over resist, e.g. for selective electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01257—Changing the shapes of bumps by reflowing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)

Abstract

구멍 또는 오목한 부분[예를 들어, 차폐공(blind aperture)] 및 상기 구멍 또는 오목한 부분들에 의하여 노출된 도전체 및/또는 패드들을 갖는 유전층의 표면상에 도전성 재료층을 피착시키고, 또 다른 패터닝된 유전층으로 상기 도전성 재료영역을 마스킹하며, 상기 마스크에 의하여 노출된 상기 도전성 재료 영역 상에 땜납 재료를 전기도금하고, 선택적 에칭에 의하여 상기 마스크 및 상기 도전성 재료의 부분을 제거하며, 또 상기 구멍을 갖는 유전층 표면의 최소한 한 부분으로부터 땜납을 리플로우링시키므로써 작고 밀착 이격된 땜납 재료의 피착이 높은 부피 정확도 및 모양의 균일성을 갖도록 형성될 수 있다. 차폐공들 내의 전기도금의 균일성은 유체제트 스퍼징(fluid jet sparging) 및 음극 진동의 조합에 의하여 개선된다. 전기도금 전에 침적 용기(immersion bath) 내의 땜납 재료의 구성 성분으로 도전체 재료를 대체시키므로서 최종의 땜납 부위 내에 도전체 재료가 과도하게 남겨지는 것이 방지될 수 있다.

Description

회로 패키지에의 땜납의 선택적 도포를 위한 프로세스
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따라 땜납 부위를 형성하는 초기 단계에 대한 단면도.
제6도는 본 발명에 따라 완성된 땜납 부위에 대한 단면도.
제10도는 본 발명에 따라 형성될 수 있는 다양한 장점을 갖는 땜납 부위의 구조 및 접속에 대한 도시도.

Claims (16)

  1. 땜납 부위를 형성하기 위한 방법에 있어서, 구멍을 갖고 있고 제2유전층의 구멍에 의하여 노출된 제1유전층의 최소한 표면 상의 도전층 부분 상에 땜납 재료를 전기도금하는 단계, 및 상기 제1유전층의 상기 표면부분으로부터 상기 땜납 재료를 리플로우링시키는 단계를 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  2. 제1항에 있어서, 상기 제2유전층을 제거하는 단계, 및 상기 땜납 재료에 인접한 상기 도전층의 노출된 부분을 제거하는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  3. 제1항에 있어서, 상기 도전층의 최소한 한 부분을 상기 땜납 재료로 용해시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  4. 제2항에 있어서, 상기 도전층의 최소한 한 부분을 상기 땜납 재료로 용해시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  5. 제1항에 있어서, 상기 제1유전층의 상기 구멍 측벽으로부터 상기 땜납 재료를 리플로우링시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  6. 제2항에 있어서, 상기 제1유전층의 상기 구멍 측벽으로부터 상기 땜납 재료를 리플로우링시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  7. 제1항에 있어서, 전기도금 유체의 흐름을 상기 도전층 방향으로 지향시키는 단계, 및 상기 도전층을 전기 도금 유체의 상기 흐름에 대해 직각인 방향으로 이동시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  8. 제1항에 있어서, 상기 도전층에 있는 도전성 재료를 상기 땜납 재료에 포함되어 있는 최소한 하나의 재료로 대체시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  9. 제2항에 있어서, 상기 도전층에 있는 도전성 재료를 상기 땜납 재료에 포함되어 있는 최소한 하나의 재료로 대체시키는 단계를 더 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  10. 제7항에 있어서, 상기 도전층 일부분에 있는 도전성 재료를 상기 땜납 재료에 포함되어 있는 최소한 하나의 재료로 대체시키는 단계를 포함하는 것을 특징으로 하는 땜납 부위 형성 방법.
  11. 전기도금 장치에 있어서, 전기도금 유체의 흐름을 도전층 방향으로 지향시키는 수단, 및 상기 도전층을 전기도금 유체의 상기 흐름에 대해 직각 방향으로 이동시키는 수단을 포함하는 것을 특징으로 하는 전기도금장치.
  12. 제11항에 있어서, 전기도금 유체의 흐름을 지향시키는 상기 수단은 다수의 제트 오리피스(jet orifice)들을 포함하는 것을 특징으로 하는 전기도금 장치.
  13. 제12항에 있어서, 상기 다수의 제트 오리피스들 중 최소한 2개의 제트 오리피스들 사이에 배치된 최소한 하나의 유체 리턴 구멍(fluid return aperture)을 더 포함하는 것을 특징으로 하는 전기도금 장치.
  14. 제13항에 있어서, 상기 다수의 제트 오리피스들에 전기도금 유체를 공급하기 위한 소스 플리넘수단(source plenum means), 및 상기 최소한 하나의 유체 리턴 구멍으로부터 전기도금 유체를 수납하기 위한 리턴 플리넘(return plenum)을 더 포함하는 것을 특징으로 하는 전기도금 장치.
  15. 제14항에 있어서, 상기 소스 플리넘은 상기 리턴 플리넘에 인접되어 있는 것을 특징으로 하는 전기도금 장치.
  16. 제15항에 있어서, 상기 최소한 하나의 리턴 구멍은 상기 소스 플리넘을 통하여 연장하는 튜브를 포함하는 것을 특징으로 하는 전기도금 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950061276A 1995-02-13 1995-12-28 회로 패키지에 땜납을 선택적으로 용착시키는 공정 및 그 공정을 위한 전기도금 장치 Expired - Fee Related KR100225217B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/387,686 US5597469A (en) 1995-02-13 1995-02-13 Process for selective application of solder to circuit packages
US8/387,686 1995-02-13
US08/387,686 1995-02-13

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Publication Number Publication Date
KR960032575A true KR960032575A (ko) 1996-09-17
KR100225217B1 KR100225217B1 (ko) 1999-10-15

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KR1019950061276A Expired - Fee Related KR100225217B1 (ko) 1995-02-13 1995-12-28 회로 패키지에 땜납을 선택적으로 용착시키는 공정 및 그 공정을 위한 전기도금 장치

Country Status (5)

Country Link
US (3) US5597469A (ko)
EP (1) EP0726698A3 (ko)
JP (1) JP3655961B2 (ko)
KR (1) KR100225217B1 (ko)
TW (1) TW404156B (ko)

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JPH08242071A (ja) 1996-09-17
US5656139A (en) 1997-08-12
US5672260A (en) 1997-09-30
US5597469A (en) 1997-01-28
EP0726698A3 (en) 1996-11-20
JP3655961B2 (ja) 2005-06-02
TW404156B (en) 2000-09-01
KR100225217B1 (ko) 1999-10-15

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