SG154331A1 - Glass-based soi structures - Google Patents

Glass-based soi structures

Info

Publication number
SG154331A1
SG154331A1 SG200607580-8A SG2006075808A SG154331A1 SG 154331 A1 SG154331 A1 SG 154331A1 SG 2006075808 A SG2006075808 A SG 2006075808A SG 154331 A1 SG154331 A1 SG 154331A1
Authority
SG
Singapore
Prior art keywords
glass
ceramic
semiconductor
support substrate
oxide glass
Prior art date
Application number
SG200607580-8A
Other languages
English (en)
Inventor
James Gregory Couillard
Alka Kishor Gadkaree
Joseph Frank Mach
Original Assignee
Corning Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Corning Inc filed Critical Corning Inc
Publication of SG154331A1 publication Critical patent/SG154331A1/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Element Separation (AREA)
  • Thin Film Transistor (AREA)
  • Joining Of Glass To Other Materials (AREA)
  • Laminated Bodies (AREA)
SG200607580-8A 2003-02-18 2004-02-17 Glass-based soi structures SG154331A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US44817603P 2003-02-18 2003-02-18

Publications (1)

Publication Number Publication Date
SG154331A1 true SG154331A1 (en) 2009-08-28

Family

ID=34375175

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200607580-8A SG154331A1 (en) 2003-02-18 2004-02-17 Glass-based soi structures

Country Status (9)

Country Link
US (5) US7176528B2 (de)
EP (4) EP2104132A3 (de)
JP (3) JP5152819B2 (de)
KR (5) KR101030631B1 (de)
CN (1) CN100373586C (de)
DE (1) DE602004030223D1 (de)
SG (1) SG154331A1 (de)
TW (1) TWI323485B (de)
WO (1) WO2005029576A2 (de)

Families Citing this family (427)

* Cited by examiner, † Cited by third party
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