AT516988A3 - Verfahren zum Beschichten eines Substrats - Google Patents

Verfahren zum Beschichten eines Substrats

Info

Publication number
AT516988A3
AT516988A3 ATA50292/2016A AT502922016A AT516988A3 AT 516988 A3 AT516988 A3 AT 516988A3 AT 502922016 A AT502922016 A AT 502922016A AT 516988 A3 AT516988 A3 AT 516988A3
Authority
AT
Austria
Prior art keywords
substrate
vias
coating
insulating material
electrically insulating
Prior art date
Application number
ATA50292/2016A
Other languages
English (en)
Other versions
AT516988A2 (de
AT516988B1 (de
Original Assignee
Suss Microtec Lithography Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suss Microtec Lithography Gmbh filed Critical Suss Microtec Lithography Gmbh
Publication of AT516988A2 publication Critical patent/AT516988A2/de
Publication of AT516988A3 publication Critical patent/AT516988A3/de
Application granted granted Critical
Publication of AT516988B1 publication Critical patent/AT516988B1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6508—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a liquid
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6512—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
    • H10P14/6514—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/216—Through-semiconductor vias, e.g. TSVs characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Formation Of Insulating Films (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)

Abstract

Die Erfindung betrifft das Beschichten von Substraten, die mit Vias versehen sind. Hierbei tritt das Problem auf, dass durch das Beschichtungsmittel Luft in den Vias eingeschlossen wird. Dies ist nachteilig hinsichtlich der Planheit der Oberfläche. Um dieses Problem zu lösen, ist erfindungsgemäß ein Verfahren zum Beschichten eines Substrats vorgesehen, das mit Vias versehen ist, wobei die folgenden Schritte ausgeführt werden: das Substrat wird konditioniert; und das Substrat (10) wird so mit einem elektrisch isolierenden Material beschichtet, dass im Substrat vorhandene Vias vollständig mit dem elektrisch isolierenden Material ausgefüllt werden, so dass das isolierende Material eine möglichst ebene Oberfläche hat.
ATA50292/2016A 2015-04-08 2016-04-08 Verfahren zum Beschichten eines Substrats AT516988B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL2014598A NL2014598B1 (en) 2015-04-08 2015-04-08 Method for coating a substrate.

Publications (3)

Publication Number Publication Date
AT516988A2 AT516988A2 (de) 2016-10-15
AT516988A3 true AT516988A3 (de) 2018-04-15
AT516988B1 AT516988B1 (de) 2022-10-15

Family

ID=53718091

Family Applications (1)

Application Number Title Priority Date Filing Date
ATA50292/2016A AT516988B1 (de) 2015-04-08 2016-04-08 Verfahren zum Beschichten eines Substrats

Country Status (9)

Country Link
US (1) US9799554B2 (de)
JP (1) JP6700925B2 (de)
KR (1) KR102530371B1 (de)
CN (1) CN106057639B (de)
AT (1) AT516988B1 (de)
CH (1) CH710963A8 (de)
DE (1) DE102016106400A1 (de)
NL (1) NL2014598B1 (de)
TW (1) TWI701085B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL2019096B1 (en) * 2017-06-20 2018-12-27 Suss Microtec Lithography Gmbh Nozzle tip adapter, nozzle assembly as well as nozzle
TW202313209A (zh) * 2021-05-28 2023-04-01 日商三菱綜合材料股份有限公司 金屬化合物膜之製造方法
JP7820830B2 (ja) * 2023-07-31 2026-02-26 国立研究開発法人理化学研究所 成膜方法、デバイスの製造方法、および成膜装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070032061A1 (en) * 2005-08-05 2007-02-08 Farnworth Warren M Methods of forming through-wafer interconnects and structures resulting therefrom
EP1840940A1 (de) * 2006-03-28 2007-10-03 Erich Dipl.-Ing. Thallner Vorrichtung und Verfahren zum Beschichten eines mikro- und/oder nanostrukturierten Struktursubstrats
WO2008123049A1 (ja) * 2007-03-30 2008-10-16 Jsr Corporation 被膜形成方法及びそれに用いる樹脂組成物、絶縁膜を有する構造体及びその製造方法並びに電子部品
DE102011054825A1 (de) * 2010-11-03 2012-05-03 Infineon Technologies Ag Ein Halbleiterbauelement und ein Verfahren zum Herstellen eines Halbleiterbauelements
WO2014170928A1 (ja) * 2013-04-18 2014-10-23 国立大学法人東北大学 マイクロ空室の内壁面処理方法

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04245629A (ja) 1991-01-31 1992-09-02 Texas Instr Japan Ltd 半導体装置の絶縁膜形成方法および半導体装置
JP3069762B2 (ja) * 1993-03-25 2000-07-24 東京エレクトロン株式会社 塗布膜形成方法及びその装置
JP3654597B2 (ja) * 1993-07-15 2005-06-02 株式会社ルネサステクノロジ 製造システムおよび製造方法
JPH07100429A (ja) * 1993-10-01 1995-04-18 Toray Ind Inc ポリマ溶液の塗布方法
JP2967734B2 (ja) 1996-10-18 1999-10-25 日本電気株式会社 薄膜の形成方法
JPH10214892A (ja) * 1997-01-30 1998-08-11 Sony Corp 半導体装置の製造方法
JPH11251312A (ja) * 1998-03-06 1999-09-17 Matsushita Electron Corp 半導体装置の製造方法
JPH11330674A (ja) * 1998-05-07 1999-11-30 Ngk Spark Plug Co Ltd 配線基板の製造方法
JP3598462B2 (ja) 2000-05-09 2004-12-08 東京エレクトロン株式会社 乾燥方法及び乾燥装置
JP2002043420A (ja) * 2000-07-24 2002-02-08 Mitsubishi Electric Corp 半導体装置の製造方法及び製造装置
JP4408006B2 (ja) * 2001-06-28 2010-02-03 富士通マイクロエレクトロニクス株式会社 半導体装置およびその製造方法
FR2830683A1 (fr) * 2001-10-10 2003-04-11 St Microelectronics Sa Realisation d'inductance et de via dans un circuit monolithique
JP2003133723A (ja) * 2001-10-25 2003-05-09 Matsushita Electric Ind Co Ltd 導電性ペースト充填方法および導電性ペースト充填装置
US6924221B2 (en) * 2002-12-03 2005-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated process flow to improve copper filling in a damascene structure
US6878644B2 (en) * 2003-05-06 2005-04-12 Applied Materials, Inc. Multistep cure technique for spin-on-glass films
US7345350B2 (en) 2003-09-23 2008-03-18 Micron Technology, Inc. Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias
US7892972B2 (en) * 2006-02-03 2011-02-22 Micron Technology, Inc. Methods for fabricating and filling conductive vias and conductive vias so formed
KR100756809B1 (ko) * 2006-04-28 2007-09-07 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
JP5168933B2 (ja) 2007-02-16 2013-03-27 富士通株式会社 化合物半導体装置の製造方法
US8034702B2 (en) * 2007-08-16 2011-10-11 Micron Technology, Inc. Methods of forming through substrate interconnects
WO2009050207A1 (en) * 2007-10-15 2009-04-23 Interuniversitair Microelectronica Centrum Vzw Method for producing electrical interconnects and devices made thereof
KR20090045669A (ko) * 2007-11-02 2009-05-08 주식회사 하이닉스반도체 소자분리막 제조 방법
KR100927773B1 (ko) * 2008-03-11 2009-11-20 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
DE102008045068A1 (de) 2008-08-29 2010-03-04 Suss Microtec Lithography Gmbh Verfahren zur Resist-Beschichtung einer Vertiefung in der Oberfläche eines Substrats, insbesondere eines Wafers
US20120149213A1 (en) * 2010-12-09 2012-06-14 Lakshminarayana Nittala Bottom up fill in high aspect ratio trenches
CN103579073B (zh) * 2012-07-20 2016-06-08 上海华虹宏力半导体制造有限公司 深沟槽填充方法
CN102791049B (zh) * 2012-08-09 2014-04-16 舒定涛 晶瓷厚膜电热器件及其制作方法
US8952544B2 (en) * 2013-07-03 2015-02-10 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor device and manufacturing method thereof
CN104157612A (zh) * 2014-08-21 2014-11-19 深圳市华星光电技术有限公司 Tft阵列基板的制作方法及tft阵列基板结构

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070032061A1 (en) * 2005-08-05 2007-02-08 Farnworth Warren M Methods of forming through-wafer interconnects and structures resulting therefrom
EP1840940A1 (de) * 2006-03-28 2007-10-03 Erich Dipl.-Ing. Thallner Vorrichtung und Verfahren zum Beschichten eines mikro- und/oder nanostrukturierten Struktursubstrats
WO2008123049A1 (ja) * 2007-03-30 2008-10-16 Jsr Corporation 被膜形成方法及びそれに用いる樹脂組成物、絶縁膜を有する構造体及びその製造方法並びに電子部品
DE102011054825A1 (de) * 2010-11-03 2012-05-03 Infineon Technologies Ag Ein Halbleiterbauelement und ein Verfahren zum Herstellen eines Halbleiterbauelements
WO2014170928A1 (ja) * 2013-04-18 2014-10-23 国立大学法人東北大学 マイクロ空室の内壁面処理方法

Also Published As

Publication number Publication date
TW201707802A (zh) 2017-03-01
US9799554B2 (en) 2017-10-24
JP2017018941A (ja) 2017-01-26
KR102530371B1 (ko) 2023-05-09
CN106057639B (zh) 2021-09-21
CN106057639A (zh) 2016-10-26
NL2014598A (en) 2016-10-12
NL2014598B1 (en) 2017-01-20
CH710963A8 (de) 2016-12-30
DE102016106400A1 (de) 2016-10-13
AT516988A2 (de) 2016-10-15
TWI701085B (zh) 2020-08-11
AT516988B1 (de) 2022-10-15
CH710963A2 (de) 2016-10-14
JP6700925B2 (ja) 2020-05-27
KR20160120678A (ko) 2016-10-18
US20160300759A1 (en) 2016-10-13

Similar Documents

Publication Publication Date Title
AT516292A3 (de) Verfahren zum Beschichten eines Substrats mit einem Lack sowie Vorrichtung zum Planarisieren einer Lackschicht
EP3900916A3 (de) Verfahren und vorrichtung zur generativen herstellung dreidimensionaler bauteile
AT16699U8 (de) Verfahren zur Herstellung von aluminierten Stahlblechen, die geschweißt und danach unter Druck gehärtet werden
WO2014146117A3 (en) A method and apparatus for continuously applying nanolaminate metal coatings
EP3456652A3 (de) Verfahren zum herstellen eines beschichteten verpackungsmaterials und verpackungsmaterial mit wenigstens einer sperrschicht für hydrophobe verbindungen
AT516988A3 (de) Verfahren zum Beschichten eines Substrats
WO2019069035A3 (fr) Composition de rouge a levres d'aspect mat
CH710180A8 (de) Gegenstand und Verfahren zur Herstellung eines Gegenstands.
AT518738A5 (de) Verfahren zum Bonden von Substraten
FI12009U1 (fi) Kuitupohjainen tuote
CH713317B8 (de) Substrat beschichtet mit einem Anti-Reflex-Beschichtungssystem mit Hartstoffbeschichtung sowie Verfahren zu dessen Herstellung.
JP2015515367A5 (de)
UY35950A (es) Un método y un aparato para separar una fracción de partícula de lignocelulosa y una fracción de partícula de lignina, una composición de partícula de lignina, una composición de partícula de lignocelulosa y su uso
ZA201907113B (en) Method of applying a multilayer wet-on-wet coating to a substrate
AT517050A3 (de) Heizkanaleinheit, Verfahren zum Herstellen einer Heizkanaleinheit und Umbuganlage
EP3362525A4 (de) Deckschichtzusammensetzung, verfahren zur beschichtung von substraten damit und substrat
AT525618A5 (de) Verfahren zum Beschichten und Bonden von Substraten
AT520565A5 (de) Vorrichtung und Verfahren zum Beschichten eines Substrats
EP3112497A8 (de) Graphenbeschichtung auf einem magnesiumlegierungssubstrat
BR112015027990A2 (pt) método para a produção de componente com um nível predeterminado de brilho
MX2021002420A (es) Metodos para elaborar articulos de vidrio revestidos tales como contenedores de vidrio revestidos.
CN103990587A (zh) 一种uv涂装施工工艺
AT517742A5 (de) Vorrichtung und Verfahren zum Bonden von Substraten
AT526564A5 (de) Verfahren und Vorrichtung zum Prägen von Substraten
CH701184A8 (de) Verfahren zur Herstellung eines Solarpaneels.