ATE195611T1 - Wärmebehandlung einer halbleiterscheibe - Google Patents

Wärmebehandlung einer halbleiterscheibe

Info

Publication number
ATE195611T1
ATE195611T1 AT93913582T AT93913582T ATE195611T1 AT E195611 T1 ATE195611 T1 AT E195611T1 AT 93913582 T AT93913582 T AT 93913582T AT 93913582 T AT93913582 T AT 93913582T AT E195611 T1 ATE195611 T1 AT E195611T1
Authority
AT
Austria
Prior art keywords
pct
impurity
atmosphere
heat treatment
sec
Prior art date
Application number
AT93913582T
Other languages
English (en)
Inventor
Masataka Horai
Naoshi Adachi
Hideshi Nishikawa
Masakazu Sano
Original Assignee
Sumitomo Metal Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Metal Ind filed Critical Sumitomo Metal Ind
Application granted granted Critical
Publication of ATE195611T1 publication Critical patent/ATE195611T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/94—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/03—Gettering within semiconductor bodies within silicon bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S117/00—Single-crystal, oriented-crystal, and epitaxy growth processes; non-coating apparatus therefor
    • Y10S117/906—Special atmosphere other than vacuum or inert
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/003—Anneal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/022—Controlled atmosphere
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/909—Controlled atmosphere
AT93913582T 1992-06-29 1993-06-25 Wärmebehandlung einer halbleiterscheibe ATE195611T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4196576A JP2560178B2 (ja) 1992-06-29 1992-06-29 半導体ウェーハの製造方法
PCT/JP1993/000865 WO1994000872A1 (en) 1992-06-29 1993-06-25 Thermal treatment of a semiconductor wafer

Publications (1)

Publication Number Publication Date
ATE195611T1 true ATE195611T1 (de) 2000-09-15

Family

ID=16360044

Family Applications (1)

Application Number Title Priority Date Filing Date
AT93913582T ATE195611T1 (de) 1992-06-29 1993-06-25 Wärmebehandlung einer halbleiterscheibe

Country Status (7)

Country Link
US (1) US5508207A (de)
EP (1) EP0603358B1 (de)
JP (1) JP2560178B2 (de)
KR (1) KR0181532B1 (de)
AT (1) ATE195611T1 (de)
DE (1) DE69329233T2 (de)
WO (1) WO1994000872A1 (de)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2800743B2 (ja) * 1995-11-15 1998-09-21 日本電気株式会社 薄膜トランジスタの製造方法
US5985740A (en) 1996-01-19 1999-11-16 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device including reduction of a catalyst
JP3645380B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法、情報端末、ヘッドマウントディスプレイ、ナビゲーションシステム、携帯電話、ビデオカメラ、投射型表示装置
JP3645379B2 (ja) * 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3645378B2 (ja) 1996-01-19 2005-05-11 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP3729955B2 (ja) 1996-01-19 2005-12-21 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6478263B1 (en) 1997-01-17 2002-11-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
US5888858A (en) 1996-01-20 1999-03-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and fabrication method thereof
US7056381B1 (en) 1996-01-26 2006-06-06 Semiconductor Energy Laboratory Co., Ltd. Fabrication method of semiconductor device
US6180439B1 (en) * 1996-01-26 2001-01-30 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device
US6465287B1 (en) 1996-01-27 2002-10-15 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
US6100562A (en) 1996-03-17 2000-08-08 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
CA2194653A1 (en) * 1997-01-08 1998-07-08 Junichi Matsushita Hydrogen heat treatment method of silicon wafers using a high-purity inert substitution gas
US6159824A (en) * 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
US20070122997A1 (en) * 1998-02-19 2007-05-31 Silicon Genesis Corporation Controlled process and resulting device
KR100468665B1 (ko) * 1997-05-16 2005-08-29 삼성전자주식회사 산화막형성방법
US6291868B1 (en) 1998-02-26 2001-09-18 Micron Technology, Inc. Forming a conductive structure in a semiconductor device
DE69933777T2 (de) 1998-09-02 2007-09-13 Memc Electronic Materials, Inc. Verfahren zur herstellung von einem silizium wafer mit idealem sauerstoffausfällungsverhalten
US6171965B1 (en) 1999-04-21 2001-01-09 Silicon Genesis Corporation Treatment method of cleaved film for the manufacture of substrates
US6287941B1 (en) 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6204151B1 (en) 1999-04-21 2001-03-20 Silicon Genesis Corporation Smoothing method for cleaved films made using thermal treatment
US6881644B2 (en) * 1999-04-21 2005-04-19 Silicon Genesis Corporation Smoothing method for cleaved films made using a release layer
JP2004537161A (ja) * 2001-04-11 2004-12-09 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 高抵抗率ｃｚシリコンにおけるサーマルドナー生成の制御
US20030194877A1 (en) * 2002-04-16 2003-10-16 Applied Materials, Inc. Integrated etch, rinse and dry, and anneal method and system
US7542197B2 (en) * 2003-11-01 2009-06-02 Silicon Quest Kabushiki-Kaisha Spatial light modulator featured with an anti-reflective structure
US7354815B2 (en) * 2003-11-18 2008-04-08 Silicon Genesis Corporation Method for fabricating semiconductor devices using strained silicon bearing material
KR100588217B1 (ko) * 2004-12-31 2006-06-08 동부일렉트로닉스 주식회사 반도체 소자의 게이트 산화막 형성 방법
US7780862B2 (en) 2006-03-21 2010-08-24 Applied Materials, Inc. Device and method for etching flash memory gate stacks comprising high-k dielectric
US8722547B2 (en) * 2006-04-20 2014-05-13 Applied Materials, Inc. Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistries
KR100765639B1 (ko) * 2006-07-03 2007-10-10 에스. 오. 이. 떼끄 씰리꽁 오 냉쉴라또흐 떼끄놀로지 웨이퍼의 표면 거칠기 개선 방법
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
US8993410B2 (en) 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US7811900B2 (en) * 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US8330126B2 (en) * 2008-08-25 2012-12-11 Silicon Genesis Corporation Race track configuration and method for wafering silicon solar substrates
JP5625239B2 (ja) * 2008-12-25 2014-11-19 信越半導体株式会社 貼り合わせウェーハの製造方法
US8329557B2 (en) * 2009-05-13 2012-12-11 Silicon Genesis Corporation Techniques for forming thin films by implantation with reduced channeling

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1390183A (en) * 1971-03-17 1975-04-09 Morrell Mills Co Ltd Mechanical handling
JPS5017574A (de) * 1973-06-15 1975-02-24
JPS5429560A (en) * 1977-08-10 1979-03-05 Hitachi Ltd Gas phase growth method for semiconductor
US4151007A (en) * 1977-10-11 1979-04-24 Bell Telephone Laboratories, Incorporated Hydrogen annealing process for stabilizing metal-oxide-semiconductor structures
US4154873A (en) * 1977-11-10 1979-05-15 Burr-Brown Research Corporation Method of increasing field inversion threshold voltage and reducing leakage current and electrical noise in semiconductor devices
US4192720A (en) * 1978-10-16 1980-03-11 Exxon Research & Engineering Co. Electrodeposition process for forming amorphous silicon
US4431708A (en) * 1979-12-19 1984-02-14 The United States Of America As Represented By The United States Department Of Energy Annealed CVD molybdenum thin film surface
US4312681A (en) * 1980-04-23 1982-01-26 International Business Machines Corporation Annealing of ion implanted III-V compounds in the presence of another III-V
DE3142589A1 (de) * 1981-10-27 1983-05-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zum tempern von aus metall, silizium und aus metall/silizium bestehenden schichten auf substraten in extrem trockener inertgasatmosphaere
DE3177017D1 (en) * 1981-12-31 1989-04-27 Ibm Method for reducing oxygen precipitation in silicon wafers
US4548654A (en) * 1983-06-03 1985-10-22 Motorola, Inc. Surface denuding of silicon wafer
JPS60249336A (ja) * 1984-05-24 1985-12-10 Komatsu Denshi Kinzoku Kk 半導体シリコン基板の処理方法
JPS61150340A (ja) * 1984-12-25 1986-07-09 Fujitsu Ltd 化合物半導体装置の製造方法
EP0192143B1 (de) * 1985-02-09 1996-01-10 Asahi Kasei Kogyo Kabushiki Kaisha Durchlässige Polymer-Membran für die Gastrocknung
JPS61193459A (ja) * 1985-02-21 1986-08-27 Toshiba Corp シリコンウエハの処理方法
DE3689735T2 (de) * 1985-08-02 1994-06-30 Semiconductor Energy Lab Verfahren und Gerät zur Herstellung von Halbleitervorrichtungen.
JPH01205417A (ja) * 1988-02-12 1989-08-17 Hitachi Ltd 半導体装置の製造方法
JPH02102520A (ja) * 1988-10-12 1990-04-16 Hitachi Ltd 気相エピタキシヤル成長方法
US5213670A (en) * 1989-06-30 1993-05-25 Siemens Aktiengesellschaft Method for manufacturing a polycrystalline layer on a substrate
JP2523380B2 (ja) * 1989-10-05 1996-08-07 東芝セラミックス株式会社 シリコンウエハの清浄化方法
JP3032565B2 (ja) * 1990-10-31 2000-04-17 株式会社東芝 半導体装置の製造方法
US5194928A (en) * 1991-01-14 1993-03-16 International Business Machines Corporation Passivation of metal in metal/polyimide structure
KR940009597B1 (ko) * 1991-08-22 1994-10-15 삼성전자 주식회사 반도체장치의 게이트산화막 형성법

Also Published As

Publication number Publication date
DE69329233T2 (de) 2001-02-08
EP0603358B1 (de) 2000-08-16
KR0181532B1 (ko) 1999-04-15
US5508207A (en) 1996-04-16
DE69329233D1 (de) 2000-09-21
WO1994000872A1 (en) 1994-01-06
EP0603358A1 (de) 1994-06-29
JP2560178B2 (ja) 1996-12-04
JPH0620896A (ja) 1994-01-28

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