ATE322080T1 - Verbundbauteil, verfahren zu seiner trennung, und herstellungsverfahren eines halbleitersubstrates unter verwendung desselben - Google Patents

Verbundbauteil, verfahren zu seiner trennung, und herstellungsverfahren eines halbleitersubstrates unter verwendung desselben

Info

Publication number
ATE322080T1
ATE322080T1 AT99301181T AT99301181T ATE322080T1 AT E322080 T1 ATE322080 T1 AT E322080T1 AT 99301181 T AT99301181 T AT 99301181T AT 99301181 T AT99301181 T AT 99301181T AT E322080 T1 ATE322080 T1 AT E322080T1
Authority
AT
Austria
Prior art keywords
semiconductor substrate
separation
same
base
composite component
Prior art date
Application number
AT99301181T
Other languages
English (en)
Inventor
Kazuaki Ohmi
Kazutaka Yanagita
Kiyofumi Sakaguchi
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Kk filed Critical Canon Kk
Application granted granted Critical
Publication of ATE322080T1 publication Critical patent/ATE322080T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1924—Preparing SOI wafers with separation/delamination along a porous layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
AT99301181T 1998-02-18 1999-02-17 Verbundbauteil, verfahren zu seiner trennung, und herstellungsverfahren eines halbleitersubstrates unter verwendung desselben ATE322080T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3582098 1998-02-18

Publications (1)

Publication Number Publication Date
ATE322080T1 true ATE322080T1 (de) 2006-04-15

Family

ID=12452596

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99301181T ATE322080T1 (de) 1998-02-18 1999-02-17 Verbundbauteil, verfahren zu seiner trennung, und herstellungsverfahren eines halbleitersubstrates unter verwendung desselben

Country Status (9)

Country Link
US (2) US6342433B1 (de)
EP (1) EP0938129B1 (de)
KR (1) KR100351024B1 (de)
CN (1) CN1175498C (de)
AT (1) ATE322080T1 (de)
DE (1) DE69930583T2 (de)
MY (1) MY118019A (de)
SG (1) SG81964A1 (de)
TW (1) TW437078B (de)

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FR2889887B1 (fr) 2005-08-16 2007-11-09 Commissariat Energie Atomique Procede de report d'une couche mince sur un support
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Also Published As

Publication number Publication date
KR19990072744A (ko) 1999-09-27
MY118019A (en) 2004-08-30
KR100351024B1 (ko) 2002-08-30
US6342433B1 (en) 2002-01-29
EP0938129B1 (de) 2006-03-29
TW437078B (en) 2001-05-28
DE69930583T2 (de) 2006-12-28
EP0938129A1 (de) 1999-08-25
SG81964A1 (en) 2001-07-24
US20020093047A1 (en) 2002-07-18
CN1175498C (zh) 2004-11-10
CN1228607A (zh) 1999-09-15
DE69930583D1 (de) 2006-05-18
US6597039B2 (en) 2003-07-22

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