ATE546835T1 - Verfahren zur herstellung eines leiterrahmens - Google Patents

Verfahren zur herstellung eines leiterrahmens

Info

Publication number
ATE546835T1
ATE546835T1 AT02743870T AT02743870T ATE546835T1 AT E546835 T1 ATE546835 T1 AT E546835T1 AT 02743870 T AT02743870 T AT 02743870T AT 02743870 T AT02743870 T AT 02743870T AT E546835 T1 ATE546835 T1 AT E546835T1
Authority
AT
Austria
Prior art keywords
producing
conductor frame
plated
mounting surface
palladium
Prior art date
Application number
AT02743870T
Other languages
English (en)
Inventor
Kazunori Iitani
Youichirou Hamada
Original Assignee
Sumitomo Metal Mining Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2001207316A external-priority patent/JP4852802B2/ja
Application filed by Sumitomo Metal Mining Co filed Critical Sumitomo Metal Mining Co
Application granted granted Critical
Publication of ATE546835T1 publication Critical patent/ATE546835T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • H10W70/042Etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/456Materials
    • H10W70/457Materials of metallic layers on leadframes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/59Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • ing And Chemical Polishing (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
AT02743870T 2001-07-09 2002-07-09 Verfahren zur herstellung eines leiterrahmens ATE546835T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001207316A JP4852802B2 (ja) 2001-06-19 2001-07-09 リードフレーム
PCT/JP2002/006933 WO2003007373A1 (en) 2001-07-09 2002-07-09 Lead frame and its manufacturing method

Publications (1)

Publication Number Publication Date
ATE546835T1 true ATE546835T1 (de) 2012-03-15

Family

ID=19043321

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02743870T ATE546835T1 (de) 2001-07-09 2002-07-09 Verfahren zur herstellung eines leiterrahmens

Country Status (8)

Country Link
US (3) US7235868B2 (de)
EP (2) EP1406300B1 (de)
KR (2) KR100908891B1 (de)
CN (1) CN1317762C (de)
AT (1) ATE546835T1 (de)
ES (1) ES2383874T3 (de)
TW (1) TWI264099B (de)
WO (1) WO2003007373A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6943434B2 (en) * 2002-10-03 2005-09-13 Fairchild Semiconductor Corporation Method for maintaining solder thickness in flipchip attach packaging processes
US8492883B2 (en) * 2008-03-14 2013-07-23 Advanced Semiconductor Engineering, Inc. Semiconductor package having a cavity structure
US8375577B2 (en) * 2008-06-04 2013-02-19 National Semiconductor Corporation Method of making foil based semiconductor package
US20100044850A1 (en) * 2008-08-21 2010-02-25 Advanced Semiconductor Engineering, Inc. Advanced quad flat non-leaded package structure and manufacturing method thereof
JP4670931B2 (ja) * 2008-09-29 2011-04-13 住友金属鉱山株式会社 リードフレーム
JP5629969B2 (ja) * 2008-09-29 2014-11-26 凸版印刷株式会社 リードフレーム型基板の製造方法と半導体装置の製造方法
JP5549066B2 (ja) 2008-09-30 2014-07-16 凸版印刷株式会社 リードフレーム型基板とその製造方法、及び半導体装置
JP5493323B2 (ja) * 2008-09-30 2014-05-14 凸版印刷株式会社 リードフレーム型基板の製造方法
KR101148100B1 (ko) * 2008-10-22 2012-05-22 엘지이노텍 주식회사 다열형 리드프레임 및 반도체 패키지의 제조방법
KR101064755B1 (ko) * 2008-12-24 2011-09-15 엘지이노텍 주식회사 다열 리드형 리드프레임 및 이를 이용한 반도체 패키지의 제조방법
US8124447B2 (en) * 2009-04-10 2012-02-28 Advanced Semiconductor Engineering, Inc. Manufacturing method of advanced quad flat non-leaded package
US20110163430A1 (en) * 2010-01-06 2011-07-07 Advanced Semiconductor Engineering, Inc. Leadframe Structure, Advanced Quad Flat No Lead Package Structure Using the Same, and Manufacturing Methods Thereof
CN102324414B (zh) * 2011-09-13 2013-06-26 江苏长电科技股份有限公司 有基岛预填塑封料先镀后刻引线框结构及其生产方法
CN102403282B (zh) * 2011-11-22 2013-08-28 江苏长电科技股份有限公司 有基岛四面无引脚封装结构及其制造方法
CN102661829A (zh) * 2012-04-28 2012-09-12 无锡永阳电子科技有限公司 So8塑料封装传感器
CN103413766B (zh) * 2013-08-06 2016-08-10 江阴芯智联电子科技有限公司 先蚀后封芯片正装三维系统级金属线路板结构及工艺方法
CN103456645B (zh) * 2013-08-06 2016-06-01 江阴芯智联电子科技有限公司 先蚀后封三维系统级芯片正装堆叠封装结构及工艺方法
CN103400771B (zh) * 2013-08-06 2016-06-29 江阴芯智联电子科技有限公司 先蚀后封芯片倒装三维系统级金属线路板结构及工艺方法
US10141197B2 (en) * 2016-03-30 2018-11-27 Stmicroelectronics S.R.L. Thermosonically bonded connection for flip chip packages
JP6777365B2 (ja) * 2016-12-09 2020-10-28 大口マテリアル株式会社 リードフレーム
CN113838761A (zh) * 2021-11-24 2021-12-24 新恒汇电子股份有限公司 物联网工业级卡的制备方法

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6050349B2 (ja) * 1980-07-09 1985-11-08 住友金属鉱山株式会社 リ−ドフレ−ムの製造方法
US4770899A (en) 1987-06-10 1988-09-13 Unisys Corporation Method of coating copper conductors on polyimide with a corrosion resistant metal, and module produced thereby
JP2807505B2 (ja) * 1989-10-20 1998-10-08 新光電気工業株式会社 リードフレームの製造方法
KR920008359Y1 (ko) * 1989-11-28 1992-11-20 현대전자산업 주식회사 리드프레임
US5235139A (en) 1990-09-12 1993-08-10 Macdermid, Incorprated Method for fabricating printed circuits
US5234139A (en) * 1991-08-06 1993-08-10 Korenstein Michael W Apparatus for the management of paired garments
JP3275413B2 (ja) * 1993-01-21 2002-04-15 凸版印刷株式会社 リードフレームおよびその製造方法
JP2004343136A (ja) * 1995-09-29 2004-12-02 Dainippon Printing Co Ltd 半導体装置
US5804880A (en) * 1996-11-04 1998-09-08 National Semiconductor Corporation Solder isolating lead frame
JP2002511187A (ja) * 1997-01-30 2002-04-09 ジィ・シィ・ビィ・テクノロジーズ・リミテッド・ライアビリティ・カンパニー 予めめっきされたリードを有する改善されたリードフレーム構造およびその製造方法
DE19704689A1 (de) * 1997-02-07 1998-08-13 Emitec Emissionstechnologie Wabenkörper mit im Inneren freiem Querschnittsbereich, insbesondere für Kleinmotoren
US5923090A (en) * 1997-05-19 1999-07-13 International Business Machines Corporation Microelectronic package and fabrication thereof
CN1068064C (zh) * 1997-05-27 2001-07-04 旭龙精密工业股份有限公司 引线框架及其制造方法
US6025640A (en) * 1997-07-16 2000-02-15 Dai Nippon Insatsu Kabushiki Kaisha Resin-sealed semiconductor device, circuit member for use therein and method of manufacturing resin-sealed semiconductor device
US6635407B1 (en) * 1997-10-28 2003-10-21 Texas Instruments Incorporated Two pass process for producing a fine pitch lead frame by etching
KR100275381B1 (ko) * 1998-04-18 2000-12-15 이중구 반도체 패키지용 리드프레임 및 리드프레임도금방법
JP4156087B2 (ja) * 1998-08-07 2008-09-24 大日本印刷株式会社 電着処理装置
US6451627B1 (en) * 1999-09-07 2002-09-17 Motorola, Inc. Semiconductor device and process for manufacturing and packaging a semiconductor device
KR100450091B1 (ko) * 1999-10-01 2004-09-30 삼성테크윈 주식회사 반도체 장치용 다층 도금 리드 프레임
US6469386B1 (en) * 1999-10-01 2002-10-22 Samsung Aerospace Industries, Ltd. Lead frame and method for plating the same
US6953986B2 (en) * 1999-12-10 2005-10-11 Texas Instruments Incorporated Leadframes for high adhesion semiconductor devices and method of fabrication
KR100421774B1 (ko) * 1999-12-16 2004-03-10 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조 방법
US6827584B2 (en) * 1999-12-28 2004-12-07 Formfactor, Inc. Interconnect for microelectronic structures with enhanced spring characteristics
US7026710B2 (en) * 2000-01-21 2006-04-11 Texas Instruments Incorporated Molded package for micromechanical devices and method of fabrication
US6238952B1 (en) * 2000-02-29 2001-05-29 Advanced Semiconductor Engineering, Inc. Low-pin-count chip package and manufacturing method thereof
KR100371567B1 (ko) * 2000-12-08 2003-02-07 삼성테크윈 주식회사 Ag 선도금을 이용한 반도체 패키지용 리드프레임
US20020170878A1 (en) * 2001-03-27 2002-11-21 Bmc Industries, Inc. Etching resistance of protein-based photoresist layers
JP2002299540A (ja) * 2001-04-04 2002-10-11 Hitachi Ltd 半導体装置およびその製造方法
JP4173346B2 (ja) * 2001-12-14 2008-10-29 株式会社ルネサステクノロジ 半導体装置
US6713852B2 (en) * 2002-02-01 2004-03-30 Texas Instruments Incorporated Semiconductor leadframes plated with thick nickel, minimum palladium, and pure tin
JP2003297994A (ja) * 2002-03-29 2003-10-17 Hitachi Ltd 半導体装置およびその製造方法
TW558776B (en) * 2002-08-22 2003-10-21 Fu Sheng Ind Co Ltd Double leadframe package

Also Published As

Publication number Publication date
EP1406300A4 (de) 2007-11-21
US20050153482A1 (en) 2005-07-14
KR20090009995A (ko) 2009-01-23
HK1069010A1 (en) 2005-05-06
TWI264099B (en) 2006-10-11
CN1317762C (zh) 2007-05-23
KR100908891B1 (ko) 2009-07-23
CN1526167A (zh) 2004-09-01
WO2003007373A1 (en) 2003-01-23
EP2312630A1 (de) 2011-04-20
KR101021600B1 (ko) 2011-03-17
US7521295B2 (en) 2009-04-21
KR20030060885A (ko) 2003-07-16
US20040169261A1 (en) 2004-09-02
US20070141756A1 (en) 2007-06-21
EP1406300B1 (de) 2012-02-22
US7235868B2 (en) 2007-06-26
EP1406300A1 (de) 2004-04-07
ES2383874T3 (es) 2012-06-27

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