AU686639B2 - Process and device for testing an integrated circuit soldered on a board - Google Patents
Process and device for testing an integrated circuit soldered on a board Download PDFInfo
- Publication number
- AU686639B2 AU686639B2 AU70715/94A AU7071594A AU686639B2 AU 686639 B2 AU686639 B2 AU 686639B2 AU 70715/94 A AU70715/94 A AU 70715/94A AU 7071594 A AU7071594 A AU 7071594A AU 686639 B2 AU686639 B2 AU 686639B2
- Authority
- AU
- Australia
- Prior art keywords
- collector
- voltage
- pin
- terminal
- additional
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000000034 method Methods 0.000 title claims abstract description 23
- 238000012360 testing method Methods 0.000 title claims description 147
- 238000005259 measurement Methods 0.000 claims abstract description 31
- 238000010998 test method Methods 0.000 claims abstract description 15
- 230000003071 parasitic effect Effects 0.000 claims description 7
- 238000012937 correction Methods 0.000 claims description 3
- 238000010606 normalization Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000000691 measurement method Methods 0.000 description 3
- 238000012795 verification Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 101100459234 Caenorhabditis elegans mxl-1 gene Proteins 0.000 description 1
- 101100270435 Mus musculus Arhgef12 gene Proteins 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005352 clarification Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000002847 impedance measurement Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
- G01R31/67—Testing the correctness of wire connections in electric apparatus or circuits
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE4319710A DE4319710C1 (de) | 1993-06-15 | 1993-06-15 | Testverfahren für einen auf einer Platine eingelöteten IC und Testvorrichtung zum Durchführen des Testverfahrens |
| DE4319710 | 1993-06-15 | ||
| PCT/EP1994/001902 WO1994029738A1 (de) | 1993-06-15 | 1994-06-11 | Testvorrichtung sowie -verfahren für einen auf einer platine eingelöteten ic |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| AU7071594A AU7071594A (en) | 1995-01-03 |
| AU686639B2 true AU686639B2 (en) | 1998-02-12 |
Family
ID=6490332
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU70715/94A Ceased AU686639B2 (en) | 1993-06-15 | 1994-06-11 | Process and device for testing an integrated circuit soldered on a board |
Country Status (13)
| Country | Link |
|---|---|
| US (1) | US6188235B1 (2) |
| EP (1) | EP0705439B1 (2) |
| JP (1) | JPH08511345A (2) |
| KR (1) | KR960703232A (2) |
| CN (1) | CN1044644C (2) |
| AT (1) | ATE157776T1 (2) |
| AU (1) | AU686639B2 (2) |
| CA (1) | CA2164415A1 (2) |
| DE (2) | DE4319710C1 (2) |
| DK (1) | DK0705439T3 (2) |
| ES (1) | ES2107236T3 (2) |
| TW (1) | TW249843B (2) |
| WO (1) | WO1994029738A1 (2) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6720774B2 (en) * | 2002-07-29 | 2004-04-13 | Sun Microsystems, Inc. | Interchangeable fan control board with fault detection |
| GB2394780B (en) * | 2002-10-29 | 2006-06-14 | Ifr Ltd | A method of and apparatus for testing for integrated circuit contact defects |
| KR100565326B1 (ko) * | 2004-05-25 | 2006-03-30 | 엘지전자 주식회사 | 이동통신 단말기의 엘씨디 컨넥터 체크 장치 |
| US7279907B2 (en) * | 2006-02-28 | 2007-10-09 | Freescale Semiconductor, Inc. | Method of testing for power and ground continuity of a semiconductor device |
| DE102008020667A1 (de) * | 2008-04-24 | 2010-05-20 | Continental Automotive Gmbh | Verfahren zur Fehlerüberwachung an einem Beleuchtungsausgang eines Kraftfahrzeuges |
| CN101571570B (zh) * | 2008-04-29 | 2013-05-22 | 京元电子股份有限公司 | 集成电路连续性测试方法及集成电路接触电阻的测量方法 |
| CN101825681B (zh) * | 2010-04-29 | 2013-07-31 | 上海宏力半导体制造有限公司 | 一种双极型晶体管电流放大系数测量方法 |
| RU173641U1 (ru) * | 2017-03-27 | 2017-09-04 | Закрытое акционерное общество "ГРУППА КРЕМНИЙ ЭЛ" | Тестовый планарный p-n-p транзистор |
| CN107424549B (zh) * | 2017-09-28 | 2020-04-17 | 京东方科技集团股份有限公司 | 阈值电压漂移的检测方法和装置 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0305148A1 (en) * | 1987-08-26 | 1989-03-01 | Hewlett-Packard Company | Determining component orientation |
| US5280237A (en) * | 1991-03-30 | 1994-01-18 | Ita Ingenieurburo Fur Testaufgaben Gmbh | Method for testing semiconductor integrated circuits soldered to boards and use of a transistor tester for this method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5254953A (en) * | 1990-12-20 | 1993-10-19 | Hewlett-Packard Company | Identification of pin-open faults by capacitive coupling through the integrated circuit package |
| US5124660A (en) * | 1990-12-20 | 1992-06-23 | Hewlett-Packard Company | Identification of pin-open faults by capacitive coupling through the integrated circuit package |
| JP3157683B2 (ja) * | 1994-08-30 | 2001-04-16 | 株式会社 沖マイクロデザイン | 半導体集積回路の静止時電流測定法、半導体集積回路 |
-
1993
- 1993-06-15 DE DE4319710A patent/DE4319710C1/de not_active Expired - Fee Related
-
1994
- 1994-06-11 EP EP94919624A patent/EP0705439B1/de not_active Expired - Lifetime
- 1994-06-11 DE DE59403978T patent/DE59403978D1/de not_active Expired - Lifetime
- 1994-06-11 AU AU70715/94A patent/AU686639B2/en not_active Ceased
- 1994-06-11 CA CA002164415A patent/CA2164415A1/en not_active Abandoned
- 1994-06-11 US US08/557,039 patent/US6188235B1/en not_active Expired - Lifetime
- 1994-06-11 CN CN94192444A patent/CN1044644C/zh not_active Expired - Fee Related
- 1994-06-11 AT AT94919624T patent/ATE157776T1/de active
- 1994-06-11 KR KR1019950705708A patent/KR960703232A/ko not_active Withdrawn
- 1994-06-11 JP JP7501337A patent/JPH08511345A/ja active Pending
- 1994-06-11 DK DK94919624.0T patent/DK0705439T3/da active
- 1994-06-11 ES ES94919624T patent/ES2107236T3/es not_active Expired - Lifetime
- 1994-06-11 WO PCT/EP1994/001902 patent/WO1994029738A1/de not_active Ceased
- 1994-09-02 TW TW083108101A patent/TW249843B/zh active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0305148A1 (en) * | 1987-08-26 | 1989-03-01 | Hewlett-Packard Company | Determining component orientation |
| US5280237A (en) * | 1991-03-30 | 1994-01-18 | Ita Ingenieurburo Fur Testaufgaben Gmbh | Method for testing semiconductor integrated circuits soldered to boards and use of a transistor tester for this method |
Also Published As
| Publication number | Publication date |
|---|---|
| ES2107236T3 (es) | 1997-11-16 |
| EP0705439B1 (de) | 1997-09-03 |
| CN1044644C (zh) | 1999-08-11 |
| KR960703232A (ko) | 1996-06-19 |
| EP0705439A1 (de) | 1996-04-10 |
| WO1994029738A1 (de) | 1994-12-22 |
| US6188235B1 (en) | 2001-02-13 |
| ATE157776T1 (de) | 1997-09-15 |
| DE59403978D1 (de) | 1997-10-09 |
| CA2164415A1 (en) | 1994-12-22 |
| JPH08511345A (ja) | 1996-11-26 |
| CN1125482A (zh) | 1996-06-26 |
| DE4319710C1 (de) | 1994-09-29 |
| AU7071594A (en) | 1995-01-03 |
| TW249843B (2) | 1995-06-21 |
| DK0705439T3 (da) | 1998-04-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |