EP2008287B1 - Composant thermistor électrique ptc et son procédé de production - Google Patents

Composant thermistor électrique ptc et son procédé de production Download PDF

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Publication number
EP2008287B1
EP2008287B1 EP07722254.5A EP07722254A EP2008287B1 EP 2008287 B1 EP2008287 B1 EP 2008287B1 EP 07722254 A EP07722254 A EP 07722254A EP 2008287 B1 EP2008287 B1 EP 2008287B1
Authority
EP
European Patent Office
Prior art keywords
layer
component
conductive layer
main body
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP07722254.5A
Other languages
German (de)
English (en)
Other versions
EP2008287A1 (fr
Inventor
Udo Theissl
Andreas Webhofer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Electronics AG
Original Assignee
Epcos AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epcos AG filed Critical Epcos AG
Publication of EP2008287A1 publication Critical patent/EP2008287A1/fr
Application granted granted Critical
Publication of EP2008287B1 publication Critical patent/EP2008287B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/02—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient
    • H01C7/022—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances
    • H01C7/023—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material having positive temperature coefficient mainly consisting of non-metallic substances containing oxides or oxidic compounds, e.g. ferrites
    • H01C7/025—Perovskites, e.g. titanates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
    • H01C1/1406—Terminals or electrodes formed on resistive elements having positive temperature coefficient
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C1/00—Details
    • H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
    • H01C1/148—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors the terminals embracing or surrounding the resistive element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
    • H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49082—Resistor making
    • Y10T29/49085—Thermally variable

Definitions

  • Ceramic components and methods for their preparation are for. B. from the publications DE 4029681 A1 . DE 10218154 A1 . DE 4207915 A1 . DE 100 53 769 A1 and JP 01 128 501 A known.
  • An object to be solved is to specify a PTC thermistor component which has particularly low tolerance errors with regard to electrical properties. Another object to be solved is to provide a method for producing such a device.
  • the component comprises a first and a second conductive layer, which are preferably arranged on an end face of the base body.
  • the lateral surface of the main body is free of the first conductive layer.
  • the second conductive layer forms a cap which covers the front side of the base body across edges, this layer lying partially on the lateral surface of the base body.
  • a first and a second conductive layer are provided on each end face.
  • the component preferably has a mirror symmetry.
  • the first conductive layer is limited to the respective end face of the base body.
  • the first conductive layer is not edge-spanning unlike the second conductive layer.
  • the first layer contacts the main body.
  • An end-side region of the second conductive layer is arranged on the first conductive layer, and a further region of the second conductive layer contacts the lateral surface of the main body.
  • the first conductive layer is preferably a barrier-degrading barrier layer.
  • the second conductive layer unlike the first conductive layer, is not provided as a barrier layer, but as a solder for z. B. provided with a circuit board, suitable for surface mounting electrical connection of the device.
  • the component is therefore preferably surface mountable.
  • the base body is preferably rectangular in cross-section, or its lateral surface has at least one flat side surface.
  • Both first and second conductive layers may comprise multiple sublayers of different materials.
  • the sub-layer of the respective conductive layer facing the base body is preferably an adhesion-promoting layer.
  • the first conductive layer according to the invention comprises several sub-layers of different materials on z.
  • the second conductive layer may, for. B. have a silver-containing lower sub-layer, a nickel-containing middle sub-layer and a solderable, especially tin-containing upper sub-layer.
  • the lower silver layer can be activated with a Pd activator before nickel plating.
  • the lowermost sub-layer of the first conductive layer is preferably sputtered on and possibly galvanically reinforced.
  • Further partial layers of the first conductive layer may, for. B. be applied chemically or electroplated.
  • the partial layers of the first conductive layer can also be produced in each case by screen printing with subsequent baking.
  • the second conductive layer preferably comprises at least one applied by a dipping process layer, for. B. on a silver-containing layer. This is preferably the lowest layer of the second conductive layer. As mentioned above, at least one further layer can be applied to the lowermost layer, which can also be produced chemically or galvanically in a dipping process by screen printing.
  • the large-area substrate is preferably produced by pressing a ceramic-containing material with predetermined properties and subsequent sintering.
  • 50% of the ceramic material ML151 and 50% of the ceramic material ML251 dry or wet homogenized the mixture is preferably pressed on a uniaxial dry press and sintered.
  • the substrate is lapped in a variant, preferably after sintering, preferably to a prescribed thickness, kept in a solution containing sulfuric acid for a predetermined period of time to improve the adhesion of the sputtered layer, and then washed.
  • the main surfaces of the substrate are metallized.
  • a preferably chromium-containing layer is first applied by sputtering.
  • the Cr layer may, for. B. be produced in a thickness of 0.1 to 1.0 microns.
  • a nickel-containing layer z. B. preferably applied with a thickness of 0.1 to 1.0 microns by sputtering and galvanically or chemically reinforced to a thickness that preferably exceeds 1 micron and z. B. 2 to 10 microns.
  • the substrate is preferably sawn to form isolated device regions.
  • edges between end faces and lateral surface of the body are rounded or at least flattened by scrubbing with the addition of water and SiC powder.
  • the conductive caps are applied in a dipping process, wherein each base body is immersed in a metal-containing, preferably silver-containing paste, which preferably after immersion under air atmosphere and at a temperature by Max. 900 ° C is baked.
  • the metal layer produced in this case is preferably to produce a uniform layer thickness z.
  • the conductive caps are activated after polishing preferably in the order given with Pd activator, nickel-plated and tin-plated.
  • the nickel plating is preferably carried out chemically, d. H. de-energized.
  • the tinning is preferably carried out galvanically. In principle, the Pd activation can be dispensed with if the nickel plating is carried out galvanically.
  • the barrier layer is already produced before and not after the separation of the component regions in a dipping process has the advantage that the geometric dimensions determining the electrical properties of the component and thus also the manufacturing tolerances with regard to the electrical properties of the components can be kept low , although the conductive caps are directly on the body, but they have essentially no effect on the electrical resistance of the device.
  • FIG. 1 shows a large-area substrate 10 with a coated on its two major surfaces barrier layer 21, 22.
  • the substrate 10 has not yet isolated device areas 101 - 106 on. With dashed lines sawing lines, ie boundaries between different component areas are indicated.
  • Each component region comprises a main body 1 and barrier layers 21, 22 arranged on its end faces.
  • the large-area substrate 10 is formed as a rod which is sawn perpendicular to its longitudinal direction.
  • the large-area substrate 10 can also have component regions arranged as a two-dimensional matrix. It is sawed in transverse directions.
  • FIGS. 2 and 3 For example, a discrete device region 101 is shown before or after scrubbing.
  • the immersed component area with silver-containing caps 31, 32, which cover its frontal ends across edges, is in FIG. 4 shown.
  • To the front side facing edge portions of the side surfaces of the body are covered by the caps 31, 32nd
  • the barrier layer 21, 22 has a lower partial layer 211, 221 (eg Cr layer) applied by sputtering and possibly galvanically reinforced, if appropriate a chemically applied middle partial layer (eg Ni layer not shown in the figure) ) and an electrodeposited upper sub-layer 212, 222 (eg, Ni layer).
  • a lower partial layer 211, 221 eg Cr layer
  • a middle partial layer eg Ni layer not shown in the figure
  • electrodeposited upper sub-layer 212, 222 eg, Ni layer
  • a tin-containing solderable layer 41, 42 is arranged on the silver-containing cap 31, 32 produced by dipping.
  • the downwardly facing portions of the caps 31, 32 form surface mounting suitable contacts of the device (SMD contacts).
  • the specified component and method is not limited to the embodiments shown in the figures and in particular the illustrated shape of the base body and number and material of partial layers. All layers applied by sputtering can also be produced in a dipping process or a screen printing process followed by firing.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Claims (11)

  1. Composant de thermistance CTP électrique comprenant
    - un corps de base (1) qui comporte des faces avant opposées l'une à l'autre et une surface d'enveloppe,
    - une première couche conductrice et une deuxième couche conductrice, qui sont respectivement disposées sur une face avant du corps de base (1),
    - dans lequel la surface d'enveloppe du corps de base (1) est dépourvue de la première couche conductrice, et
    - dans lequel la deuxième couche conductrice forme un capuchon (31, 32) qui recouvre une face avant du corps de base (1) en recouvrant ses arêtes,
    - dans lequel la première couche conductrice comporte plusieurs couches partielles constituée de différents matériaux.
  2. Composant selon la revendication 1,
    - dans lequel le corps de base (1) contient un matériau céramique,
    - dans lequel la première couche conductrice est une couche-barrière (21, 22) formant une couche d'arrêt.
  3. Composant selon la revendication 1 ou 2,
    - dans lequel la deuxième couche conductrice comporte une surface pouvant être soudée.
  4. Composant selon l'une quelconque des revendications 1 à 3, qui peut être monté en surface.
  5. Composant selon l'une quelconque des revendications 1 à 4,
    - dans lequel la première couche conductrice comporte une couche partielle pulvérisée (211, 221) et une couche partielle (212, 222) appliquée de manière galvanique.
  6. Composant selon l'une quelconque des revendications 1 à 5,
    - dans lequel la deuxième couche conductrice comporte au moins une couche appliquée par un procédé d'immersion.
  7. Composant selon l'une quelconque des revendications 1 à 6,
    dans lequel les arêtes sont biseautées ou arrondies entre des faces avant et la surface d'enveloppe du corps de base.
  8. Procédé d'établissement d'une thermistance CTP-composant, comprenant les étapes consistant à:
    A) sur des surfaces principales d'un substrat (10) contenant une céramique PTC et comprenant des régions (101 - 106) prévues sous la forme de zones de composants, une couche-barrière conductrice (21, 22) est générée par pulvérisation ;
    B) le substrat (10) est isolé conformément aux zones de composants, dans lequel chaque zone de composant isolée comprend un corps de base (1), sur les deux faces avant duquel est disposée la couche-barrière (21, 22), dans lequel les surfaces d'enveloppe du corps de base (1) sont dépourvues de la couche barrière (21, 22);
    C) sur les zones de composants isolées, des capuchons conducteurs (31, 32) sont générés en étant disposés du côté de la face avant, ceux-ci étant appliqués par un procédé d'immersion et ensuite cuits.
  9. Procédé selon la revendication 8,
    dans lequel la couche barrière (21, 22) est amplifiée de manière galvanique.
  10. Procédé selon la revendication 8 ou 9,
    dans lequel les capuchons conducteurs (31, 32) sont étamés après le procédé d'immersion.
  11. Procédé selon l'une quelconque des revendications 8 à 10,
    dans lequel, avant l'application des capuchons, les arêtes sont arrondies par abrasion entre des faces avant et la surface d'enveloppe du corps de base.
EP07722254.5A 2006-04-18 2007-04-18 Composant thermistor électrique ptc et son procédé de production Active EP2008287B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006017796A DE102006017796A1 (de) 2006-04-18 2006-04-18 Elektrisches Kaltleiter-Bauelement
PCT/DE2007/000696 WO2007118472A1 (fr) 2006-04-18 2007-04-18 Composant thermistor électrique et son procédé de production

Publications (2)

Publication Number Publication Date
EP2008287A1 EP2008287A1 (fr) 2008-12-31
EP2008287B1 true EP2008287B1 (fr) 2017-02-15

Family

ID=38249244

Family Applications (1)

Application Number Title Priority Date Filing Date
EP07722254.5A Active EP2008287B1 (fr) 2006-04-18 2007-04-18 Composant thermistor électrique ptc et son procédé de production

Country Status (5)

Country Link
US (1) US8154379B2 (fr)
EP (1) EP2008287B1 (fr)
JP (2) JP5038395B2 (fr)
DE (1) DE102006017796A1 (fr)
WO (1) WO2007118472A1 (fr)

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KR101099356B1 (ko) * 2008-01-29 2011-12-26 가부시키가이샤 무라타 세이사쿠쇼 칩형 반도체 세라믹 전자부품
JP2013153129A (ja) 2011-09-29 2013-08-08 Rohm Co Ltd チップ抵抗器および抵抗回路網を有する電子機器
JP6134507B2 (ja) 2011-12-28 2017-05-24 ローム株式会社 チップ抵抗器およびその製造方法
JP6107062B2 (ja) * 2012-11-06 2017-04-05 Tdk株式会社 チップサーミスタ
JP6227877B2 (ja) * 2013-02-26 2017-11-08 ローム株式会社 チップ抵抗器、およびチップ抵抗器の製造方法
JP7268393B2 (ja) * 2019-02-22 2023-05-08 三菱マテリアル株式会社 サーミスタの製造方法
DE102019122611A1 (de) * 2019-08-22 2021-02-25 Endress+Hauser SE+Co. KG SMD-lötbares Bauelement und Verfahren zum Herstellen eines SMD-lötbaren Bauelements
CN116195011A (zh) * 2020-09-17 2023-05-30 株式会社村田制作所 芯片型陶瓷半导体电子元件

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Also Published As

Publication number Publication date
US20090167481A1 (en) 2009-07-02
JP2009534814A (ja) 2009-09-24
JP5038395B2 (ja) 2012-10-03
US8154379B2 (en) 2012-04-10
JP2012212931A (ja) 2012-11-01
EP2008287A1 (fr) 2008-12-31
JP5603904B2 (ja) 2014-10-08
WO2007118472A1 (fr) 2007-10-25
DE102006017796A1 (de) 2007-10-25

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