JPH0189741U - - Google Patents
Info
- Publication number
- JPH0189741U JPH0189741U JP1987185475U JP18547587U JPH0189741U JP H0189741 U JPH0189741 U JP H0189741U JP 1987185475 U JP1987185475 U JP 1987185475U JP 18547587 U JP18547587 U JP 18547587U JP H0189741 U JPH0189741 U JP H0189741U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- protective film
- operating section
- functional operating
- metal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
第１図は本考案の一実施例を模式的に示す平面
図、第２図は第１図のＡ―Ａ線に沿うその実施例
をポツテイング樹脂で被覆した状態の断面図、第
３図は金属層及びインナーリードの製作工程を模
式的に示す図、第４図は従来例の断面を模式的に
示す図、第５図及び第６図は集積回路の製造工程
の説明図である。 ２……機能動作部、３……シリコンチツプ、４
……保護膜、５……電極、６……インナーリード
、６ａ……金属層が接続されるインナーリード、
７……バンプ、８……ポツテイング樹脂、１１…
…集積回路（ＴＡＢ）、１２……金属層。
図、第２図は第１図のＡ―Ａ線に沿うその実施例
をポツテイング樹脂で被覆した状態の断面図、第
３図は金属層及びインナーリードの製作工程を模
式的に示す図、第４図は従来例の断面を模式的に
示す図、第５図及び第６図は集積回路の製造工程
の説明図である。 ２……機能動作部、３……シリコンチツプ、４
……保護膜、５……電極、６……インナーリード
、６ａ……金属層が接続されるインナーリード、
７……バンプ、８……ポツテイング樹脂、１１…
…集積回路（ＴＡＢ）、１２……金属層。
Claims (1)
- チツプ上に設けられた機能動作部と該機能動作
部上に設けられた保護膜とを有する集積回路であ
つて、該保護膜上に網目状の金属層が設けられて
いる集積回路。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987185475U JPH0189741U (ja) | 1987-12-04 | 1987-12-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987185475U JPH0189741U (ja) | 1987-12-04 | 1987-12-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0189741U true JPH0189741U (ja) | 1989-06-13 |
Family
ID=31476790
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987185475U Pending JPH0189741U (ja) | 1987-12-04 | 1987-12-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0189741U (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0444397A (ja) * | 1990-06-11 | 1992-02-14 | Alps Electric Co Ltd | 電子部品の製造方法 |
| JPH08186109A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 半導体集積回路装置 |
-
1987
- 1987-12-04 JP JP1987185475U patent/JPH0189741U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0444397A (ja) * | 1990-06-11 | 1992-02-14 | Alps Electric Co Ltd | 電子部品の製造方法 |
| JPH08186109A (ja) * | 1994-12-28 | 1996-07-16 | Nec Corp | 半導体集積回路装置 |