JPH0229525U - - Google Patents
Info
- Publication number
- JPH0229525U JPH0229525U JP1988108007U JP10800788U JPH0229525U JP H0229525 U JPH0229525 U JP H0229525U JP 1988108007 U JP1988108007 U JP 1988108007U JP 10800788 U JP10800788 U JP 10800788U JP H0229525 U JPH0229525 U JP H0229525U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor
- semiconductor integrated
- notch
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案の一実施例による半導体装置の
縦断面図、第２図は第１図の部分（Ａ部）拡大図
である。
１…ボンデイングワイヤー、２…半導体集積回
路、３…リードフレーム、４…樹脂。
FIG. 1 is a longitudinal sectional view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is an enlarged view of a portion (A section) of FIG. 1...Bonding wire, 2...Semiconductor integrated circuit, 3...Lead frame, 4...Resin.
Claims (1)
て、半導体集積回路パターンの電極パツド部を有
する面に切り欠きを有することを特徴とする半導
体装置。 1. A semiconductor device comprising a semiconductor chip mounted with a semiconductor integrated circuit, characterized in that a semiconductor integrated circuit pattern has a notch on a surface having an electrode pad portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988108007U JPH0229525U (en) | 1988-08-16 | 1988-08-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988108007U JPH0229525U (en) | 1988-08-16 | 1988-08-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0229525U true JPH0229525U (en) | 1990-02-26 |
Family
ID=31342937
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988108007U Pending JPH0229525U (en) | 1988-08-16 | 1988-08-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0229525U (en) |
-
1988
- 1988-08-16 JP JP1988108007U patent/JPH0229525U/ja active Pending