JPH0289847U - - Google Patents

Info

Publication number
JPH0289847U
JPH0289847U JP17052688U JP17052688U JPH0289847U JP H0289847 U JPH0289847 U JP H0289847U JP 17052688 U JP17052688 U JP 17052688U JP 17052688 U JP17052688 U JP 17052688U JP H0289847 U JPH0289847 U JP H0289847U
Authority
JP
Japan
Prior art keywords
lead
land
base
electronic component
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17052688U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17052688U priority Critical patent/JPH0289847U/ja
Publication of JPH0289847U publication Critical patent/JPH0289847U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案に係る半導体装置の第1の実
施例を示す側面図、第2図はこの考案の第2の実
施例を示す側面図、第3図は第2図の半導体装置
におけるリードの根元部の斜視図である。第4図
は従来の樹脂モールドタイプのハイブリツドIC
の側面図、第5図は第4図の製造途中のリードフ
レームの平面図、第6図はリードフレームの樹脂
モールド成形時の要部縦断面図である。 1……電子部品マウント用ランド、2……リー
ド、3……配線基板、4……電子部品、、5……
ワイヤ、6…外装樹脂材、11……絶縁性接着材
FIG. 1 is a side view showing a first embodiment of a semiconductor device according to this invention, FIG. 2 is a side view showing a second embodiment of this invention, and FIG. 3 is a lead in the semiconductor device of FIG. 2. It is a perspective view of the root part of. Figure 4 shows a conventional resin mold type hybrid IC.
FIG. 5 is a plan view of the lead frame in the process of being manufactured in FIG. 4, and FIG. 6 is a vertical sectional view of the main part of the lead frame during resin molding. 1...Land for electronic component mounting, 2...Lead, 3...Wiring board, 4...Electronic component, 5...
Wire, 6... Exterior resin material, 11... Insulating adhesive material.

Claims (1)

【実用新案登録請求の範囲】 ランド上に、導電パターンが形成された絶縁性
配線基板を介して複数の半導体ペレツトを含む電
子部品をマウントし、この電子部品と上記ランド
の近傍に配置された複数のリードとをワイヤにて
電気的に接続し、配線基板とリード根元部を含む
要部を外装樹脂材にて封止してなる半導体装置に
おいて、 上記リードの根元部を上記ランドの下方まで延
長したことを特徴とする半導体装置。
[Claims for Utility Model Registration] An electronic component including a plurality of semiconductor pellets is mounted on a land via an insulating wiring board on which a conductive pattern is formed, and the electronic component and a plurality of semiconductor pellets arranged near the land are In a semiconductor device in which the main parts including the wiring board and the base of the lead are sealed with an exterior resin material, the base of the lead is electrically connected to the lead by a wire, and the base of the lead is extended below the land. A semiconductor device characterized by:
JP17052688U 1988-12-27 1988-12-27 Pending JPH0289847U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17052688U JPH0289847U (en) 1988-12-27 1988-12-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17052688U JPH0289847U (en) 1988-12-27 1988-12-27

Publications (1)

Publication Number Publication Date
JPH0289847U true JPH0289847U (en) 1990-07-17

Family

ID=31461554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17052688U Pending JPH0289847U (en) 1988-12-27 1988-12-27

Country Status (1)

Country Link
JP (1) JPH0289847U (en)

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