JPH0365747A - Dma transfer system - Google Patents

Abstract

PURPOSE:To simplify control by temporarily storing DMA (direct memory access) transfer data into a sub storage part and afterwards, transferring the data to a main storage part. CONSTITUTION:When a DMA activation signal is received from an input / output part 3, a DMA control part 5 controls DMA transfer between the input / output part 3 and the sub storage part 6 arranged within DMA address signal width. Next, when a main control part 1 receives a DMA end signal, the main control part 1 reads out the data stored in the sub storage part 6 and executes control so that these data can be stored into all the areas of the main storage part 4. In such a manner, the DMA transfer between the input / output part 3 and the sub storage part 6 is executed by the DMA control part 5 and the data transfer between the sub storage part 6 and the main storage part 4 is executed by the main control part 1. Thus, the DMA transfer can be executed without providing an address extension part and control can be simplified.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to direct mea+or
y Access (direct memory access) transfer method, especially DMA, which is narrower than the bus width of the system bus.
Conventionally, in a DMA transfer method in which DMA transfer is controlled by a DMA control unit having a DMA address signal width narrower than the bus width of the system bus, the address signal DMA by expanding the width
A transfer is taking place. FIG. 2 shows the constituent countries for explaining the conventional DMA transfer system. FIG. 2 shows an input/output unit 3 having a DMA transfer function, a main memory unit 4 connected to the input/output unit 3 via the system bus 2 and storing data, and a DM
A DMA control section 8 that controls A transfer, an address extension section 9 that extends the DMA address signal width, and a main control section 7 are shown.

Referring to FIG. 2, the DMA control unit 8 is provided with an address expansion unit 9, and a DMA address counter is added to expand the DMA address signal width, the DMA address update signal automatically updates the DMA address counter, and the main memory The DMA control section 8 directly controls DMA transfer between the input/output section 3 and the main storage section 4.

[Problem to be solved by the invention]

As mentioned above, in the conventional DMA transfer method, an address extension section is provided in the DMA control section, a DMA address counter is added, and the DMA address counter is automatically updated to enable DMA transfer to all areas of the main memory. , DMA
There is a problem in that as the number of address counters increases, control becomes more complex.

An object of the present invention is to provide a DMA transfer method that allows DMA transfer without providing an address extension section.

[Means to solve the problem]

The DMA transfer method of the present invention includes an input/output section having a DMA transfer function, a main memory section connected to the human output section via a system bus and storing data, and a DMA address signal width narrower than the bus width of the system bus. and a DMA control unit that controls DMA transfer, and a DMA that transfers data.
In the transfer method, a sub-storage section arranged in a DMA address signal width for temporarily storing DMA transfer data of the input/output section is provided, and after the DMA control section stores the DMA transfer data in the sub-storage section. The data storage device is configured to transfer data to the main storage unit via the system bus.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram for explaining one embodiment of the present invention. FIG. 1 shows an input/output unit 3 having a DMA transfer function, a main storage unit 4 connected to the input/output unit 3 via a system bus 2 and storing data, and a DMA control unit 5 that controls DMA transfer. A secondary storage section 6 that temporarily stores DMA transfer data of the input/output section 3 and a main control section 9 are shown.

In FIG. 1, the DMA control section 5 controls the D
Upon receiving the MA activation signal, it controls DMA transfer between the input/output section 3 and the sub-storage section 6 arranged in the width of the DMA address signal. Next, when the main control unit 1 receives the DMA end signal, the main control unit 1 controls to read the data stored in the secondary storage unit 6 and store these data in the entire area of the main storage unit 4. . In this way, the input/output section 3 and the sub-storage section 6
By causing the DMA control section 5 to perform DMA transfer between It can be made unnecessary.

〔Effect of the invention〕

As explained above, the present invention provides a sub-storage section arranged in a DMA address signal width for temporarily storing DMA transfer data of an input/output section, and stores the DMA transfer data in the sub-storage section by a DMA control section. After that, the data is transferred to the main memory section via the system bus under the control of the main control section, so MA transfer can be easily controlled without providing a conventional address extension section. It has this effect.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining an embodiment of the present invention, and FIG. 2 is a block diagram for explaining a conventional DMA transfer method. 1.7... Main control unit, 2... System bus, 3... Input/output unit, 4... Main storage unit, 5, 8... ...DMA control section, 6...
Sub-memory section, 9...address extension section.

Claims (1)

[Claims] an input/output unit having a DMA transfer function; a main memory unit connected to the input/output unit via a system bus for storing data; and a DMA address signal having a width narrower than the bus width of the system bus and controlling the DMA transfer. In a DMA transfer method that includes a DMA control unit and transfers data, a sub-storage unit arranged in a DMA address signal width for temporarily storing DMA transfer data of the input/output unit is provided, and the DMA control unit performs DMA transfer. A DMA transfer method characterized in that the data to be transferred is stored in the secondary storage section and then transferred to the main storage section via the system bus.