JPS5483779A - Junction type field effect semiconductor device - Google Patents

Junction type field effect semiconductor device

Info

Publication number
JPS5483779A
JPS5483779A JP15197177A JP15197177A JPS5483779A JP S5483779 A JPS5483779 A JP S5483779A JP 15197177 A JP15197177 A JP 15197177A JP 15197177 A JP15197177 A JP 15197177A JP S5483779 A JPS5483779 A JP S5483779A
Authority
JP
Japan
Prior art keywords
layer
type
gate
substrate
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15197177A
Other languages
Japanese (ja)
Other versions
JPS6155787B2 (en
Inventor
Shuji Kanamori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15197177A priority Critical patent/JPS5483779A/en
Publication of JPS5483779A publication Critical patent/JPS5483779A/en
Publication of JPS6155787B2 publication Critical patent/JPS6155787B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE: To reduce a noise voltage low by making mutual conductance (gmo) large and gate diffusion resistance RG small without deteriorating a threshold level and reverse dielectric strength.
CONSTITUTION: In N-type epitaxial layer 12 on P-type substrate 11, P+-type substrate extraction layer 13, P+-type gate layer 14, N+-type drain 15, and N+- type source 16 are formed. The places, where a source and drain ar expected to be formed, surrounded with gate layer 14 are shorted to substrate 11 at the same time as the formation of substrate extraction layer 13, so that the gate width for a noise- source resistance will be from substrate extraction layer 13 at the external circumference separating epitaxial layer 12 to the region where a drain or source layer is shorted to the substrate. When this distance is denoted by Z' and the sheet resistance of the gate is by Ps, RG is nearly equal to Ps×Z'/nl, so that RG can be reduced with no special process. In this way, the noise voltage can be reduced without deteriorating Vth and reverse dielectric strength, while gate width z is being made smaller.
COPYRIGHT: (C)1979,JPO&Japio
JP15197177A 1977-12-16 1977-12-16 Junction type field effect semiconductor device Granted JPS5483779A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15197177A JPS5483779A (en) 1977-12-16 1977-12-16 Junction type field effect semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15197177A JPS5483779A (en) 1977-12-16 1977-12-16 Junction type field effect semiconductor device

Publications (2)

Publication Number Publication Date
JPS5483779A true JPS5483779A (en) 1979-07-04
JPS6155787B2 JPS6155787B2 (en) 1986-11-29

Family

ID=15530213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15197177A Granted JPS5483779A (en) 1977-12-16 1977-12-16 Junction type field effect semiconductor device

Country Status (1)

Country Link
JP (1) JPS5483779A (en)

Also Published As

Publication number Publication date
JPS6155787B2 (en) 1986-11-29

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