JPS5954220A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS5954220A
JPS5954220A JP57164454A JP16445482A JPS5954220A JP S5954220 A JPS5954220 A JP S5954220A JP 57164454 A JP57164454 A JP 57164454A JP 16445482 A JP16445482 A JP 16445482A JP S5954220 A JPS5954220 A JP S5954220A
Authority
JP
Japan
Prior art keywords
substrate
layer
defect
concentration
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57164454A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6312376B2 (fr
Inventor
Yoshiaki Suzuki
芳明 鈴木
Osamu Mizuno
修 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57164454A priority Critical patent/JPS5954220A/ja
Publication of JPS5954220A publication Critical patent/JPS5954220A/ja
Publication of JPS6312376B2 publication Critical patent/JPS6312376B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H10P14/3441—Conductivity type
    • H10P14/3442—N-type
JP57164454A 1982-09-21 1982-09-21 半導体装置の製造方法 Granted JPS5954220A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57164454A JPS5954220A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57164454A JPS5954220A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS5954220A true JPS5954220A (ja) 1984-03-29
JPS6312376B2 JPS6312376B2 (fr) 1988-03-18

Family

ID=15793477

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57164454A Granted JPS5954220A (ja) 1982-09-21 1982-09-21 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS5954220A (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63104322A (ja) * 1986-10-21 1988-05-09 Toshiba Corp エピタキシヤルウエ−ハ
JPH04237134A (ja) * 1991-01-22 1992-08-25 Nec Corp エピタキシャルウェハーの製造方法
US5734195A (en) * 1993-03-30 1998-03-31 Sony Corporation Semiconductor wafer for epitaxially grown devices having a sub-surface getter region
US9004269B2 (en) 2011-01-13 2015-04-14 Tsubakimoto Chain Company Conveyor chain

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63104322A (ja) * 1986-10-21 1988-05-09 Toshiba Corp エピタキシヤルウエ−ハ
JPH04237134A (ja) * 1991-01-22 1992-08-25 Nec Corp エピタキシャルウェハーの製造方法
US5734195A (en) * 1993-03-30 1998-03-31 Sony Corporation Semiconductor wafer for epitaxially grown devices having a sub-surface getter region
US5874348A (en) * 1993-03-30 1999-02-23 Sony Corporation Semiconductor wafer and method of manufacturing same
US6140213A (en) * 1993-03-30 2000-10-31 Sony Corporation Semiconductor wafer and method of manufacturing same
US9004269B2 (en) 2011-01-13 2015-04-14 Tsubakimoto Chain Company Conveyor chain

Also Published As

Publication number Publication date
JPS6312376B2 (fr) 1988-03-18

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