JPS6014461A - 相補型絶縁ゲート電界効果トランジスタの製造方法 - Google Patents

相補型絶縁ゲート電界効果トランジスタの製造方法

Info

Publication number
JPS6014461A
JPS6014461A JP58121185A JP12118583A JPS6014461A JP S6014461 A JPS6014461 A JP S6014461A JP 58121185 A JP58121185 A JP 58121185A JP 12118583 A JP12118583 A JP 12118583A JP S6014461 A JPS6014461 A JP S6014461A
Authority
JP
Japan
Prior art keywords
drain
impurity concentration
source
transistor
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58121185A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0527266B2 (fr
Inventor
Katsutada Horiuchi
勝忠 堀内
Ken Yamaguchi
憲 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58121185A priority Critical patent/JPS6014461A/ja
Priority to KR1019840001637A priority patent/KR910006249B1/ko
Priority to EP84103566A priority patent/EP0123936B1/fr
Priority to DE8484103566T priority patent/DE3476144D1/de
Publication of JPS6014461A publication Critical patent/JPS6014461A/ja
Priority to US07/063,785 priority patent/US4769686A/en
Publication of JPH0527266B2 publication Critical patent/JPH0527266B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • H10D30/0275Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/258Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/858Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP58121185A 1983-04-01 1983-07-04 相補型絶縁ゲート電界効果トランジスタの製造方法 Granted JPS6014461A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP58121185A JPS6014461A (ja) 1983-07-04 1983-07-04 相補型絶縁ゲート電界効果トランジスタの製造方法
KR1019840001637A KR910006249B1 (ko) 1983-04-01 1984-03-29 반도체 장치
EP84103566A EP0123936B1 (fr) 1983-04-01 1984-03-30 Dispositif semi-conducteur
DE8484103566T DE3476144D1 (en) 1983-04-01 1984-03-30 Semiconductor device
US07/063,785 US4769686A (en) 1983-04-01 1987-06-19 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58121185A JPS6014461A (ja) 1983-07-04 1983-07-04 相補型絶縁ゲート電界効果トランジスタの製造方法

Publications (2)

Publication Number Publication Date
JPS6014461A true JPS6014461A (ja) 1985-01-25
JPH0527266B2 JPH0527266B2 (fr) 1993-04-20

Family

ID=14804956

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58121185A Granted JPS6014461A (ja) 1983-04-01 1983-07-04 相補型絶縁ゲート電界効果トランジスタの製造方法

Country Status (1)

Country Link
JP (1) JPS6014461A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63115376A (ja) * 1985-10-30 1988-05-19 ハリス コーポレイション Mos電界効果トランジスタとその製造法
US5571735A (en) * 1994-06-21 1996-11-05 Nec Corporation Method of manufacturing a semiconducter device capable of easily forming metal silicide films on source and drain regions

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5488779A (en) * 1977-12-26 1979-07-14 Cho Lsi Gijutsu Kenkyu Kumiai Method of fabricating complementary mos transistor
JPS5568675A (en) * 1978-11-17 1980-05-23 Toshiba Corp Fabrication of complementary mos transistor
JPS58138053A (ja) * 1982-02-12 1983-08-16 Nec Corp 半導体装置およびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5488779A (en) * 1977-12-26 1979-07-14 Cho Lsi Gijutsu Kenkyu Kumiai Method of fabricating complementary mos transistor
JPS5568675A (en) * 1978-11-17 1980-05-23 Toshiba Corp Fabrication of complementary mos transistor
JPS58138053A (ja) * 1982-02-12 1983-08-16 Nec Corp 半導体装置およびその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63115376A (ja) * 1985-10-30 1988-05-19 ハリス コーポレイション Mos電界効果トランジスタとその製造法
US5571735A (en) * 1994-06-21 1996-11-05 Nec Corporation Method of manufacturing a semiconducter device capable of easily forming metal silicide films on source and drain regions

Also Published As

Publication number Publication date
JPH0527266B2 (fr) 1993-04-20

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