JPS60177649A - ヒユ−ズの切断方法 - Google Patents

ヒユ−ズの切断方法

Info

Publication number
JPS60177649A
JPS60177649A JP59032622A JP3262284A JPS60177649A JP S60177649 A JPS60177649 A JP S60177649A JP 59032622 A JP59032622 A JP 59032622A JP 3262284 A JP3262284 A JP 3262284A JP S60177649 A JPS60177649 A JP S60177649A
Authority
JP
Japan
Prior art keywords
fuse
film
cutting
thick
irradiated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59032622A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0519816B2 (de
Inventor
Masakazu Shiozaki
塩崎 雅一
Kenji Hishioka
菱岡 賢二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP59032622A priority Critical patent/JPS60177649A/ja
Publication of JPS60177649A publication Critical patent/JPS60177649A/ja
Publication of JPH0519816B2 publication Critical patent/JPH0519816B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493Fuses, i.e. interconnections changeable from conductive to non-conductive
    • H10W20/494Fuses, i.e. interconnections changeable from conductive to non-conductive changeable by the use of an external beam, e.g. laser beam or ion beam

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP59032622A 1984-02-24 1984-02-24 ヒユ−ズの切断方法 Granted JPS60177649A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59032622A JPS60177649A (ja) 1984-02-24 1984-02-24 ヒユ−ズの切断方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59032622A JPS60177649A (ja) 1984-02-24 1984-02-24 ヒユ−ズの切断方法

Publications (2)

Publication Number Publication Date
JPS60177649A true JPS60177649A (ja) 1985-09-11
JPH0519816B2 JPH0519816B2 (de) 1993-03-17

Family

ID=12363949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59032622A Granted JPS60177649A (ja) 1984-02-24 1984-02-24 ヒユ−ズの切断方法

Country Status (1)

Country Link
JP (1) JPS60177649A (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5892251A (ja) * 1981-11-27 1983-06-01 Fujitsu Ltd 半導体装置の製造方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5892251A (ja) * 1981-11-27 1983-06-01 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JPH0519816B2 (de) 1993-03-17

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