JPS6033452U - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

Info

Publication number
JPS6033452U
JPS6033452U JP1983123845U JP12384583U JPS6033452U JP S6033452 U JPS6033452 U JP S6033452U JP 1983123845 U JP1983123845 U JP 1983123845U JP 12384583 U JP12384583 U JP 12384583U JP S6033452 U JPS6033452 U JP S6033452U
Authority
JP
Japan
Prior art keywords
resin
semiconductor device
encapsulated semiconductor
island
recorded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983123845U
Other languages
English (en)
Inventor
明石 進一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1983123845U priority Critical patent/JPS6033452U/ja
Publication of JPS6033452U publication Critical patent/JPS6033452U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【図面の簡単な説明】
第1図は従来のチップ型半導体装置を示す断面図、第2
図は本考案の一実施例を示す断面図、第3図は本実施例
でつかわれたリードフレームの平面図である。 1・・・半導体素子、2,2′・・・アイランド部、3
.3′・・・外部リード、4・・・ボンディングワイヤ
ー、5,5′・・・樹脂、5″・・・樹脂の境界部、1
゜・・・リードフレーム。

Claims (1)

    【実用新案登録請求の範囲】
  1. 外部リード下面及び半導体素子を搭載するアイランド下
    面が露出する様に樹脂封止を行ったことを特徴とする樹
    脂封止型半導体装置。
JP1983123845U 1983-08-10 1983-08-10 樹脂封止型半導体装置 Pending JPS6033452U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983123845U JPS6033452U (ja) 1983-08-10 1983-08-10 樹脂封止型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983123845U JPS6033452U (ja) 1983-08-10 1983-08-10 樹脂封止型半導体装置

Publications (1)

Publication Number Publication Date
JPS6033452U true JPS6033452U (ja) 1985-03-07

Family

ID=30282544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983123845U Pending JPS6033452U (ja) 1983-08-10 1983-08-10 樹脂封止型半導体装置

Country Status (1)

Country Link
JP (1) JPS6033452U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62134945A (ja) * 1985-12-06 1987-06-18 Sony Corp モ−ルドトランジスタ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62134945A (ja) * 1985-12-06 1987-06-18 Sony Corp モ−ルドトランジスタ

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