JPS6156619B2 - - Google Patents

Info

Publication number
JPS6156619B2
JPS6156619B2 JP53067967A JP6796778A JPS6156619B2 JP S6156619 B2 JPS6156619 B2 JP S6156619B2 JP 53067967 A JP53067967 A JP 53067967A JP 6796778 A JP6796778 A JP 6796778A JP S6156619 B2 JPS6156619 B2 JP S6156619B2
Authority
JP
Japan
Prior art keywords
integrated circuit
lead
mounting
mounting portion
mounting part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53067967A
Other languages
English (en)
Japanese (ja)
Other versions
JPS54158863A (en
Inventor
Masakazu Matsushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6796778A priority Critical patent/JPS54158863A/ja
Publication of JPS54158863A publication Critical patent/JPS54158863A/ja
Publication of JPS6156619B2 publication Critical patent/JPS6156619B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP6796778A 1978-06-05 1978-06-05 Integrated-circuit device Granted JPS54158863A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6796778A JPS54158863A (en) 1978-06-05 1978-06-05 Integrated-circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6796778A JPS54158863A (en) 1978-06-05 1978-06-05 Integrated-circuit device

Publications (2)

Publication Number Publication Date
JPS54158863A JPS54158863A (en) 1979-12-15
JPS6156619B2 true JPS6156619B2 (2) 1986-12-03

Family

ID=13360244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6796778A Granted JPS54158863A (en) 1978-06-05 1978-06-05 Integrated-circuit device

Country Status (1)

Country Link
JP (1) JPS54158863A (2)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4663650A (en) * 1984-05-02 1987-05-05 Gte Products Corporation Packaged integrated circuit chip

Also Published As

Publication number Publication date
JPS54158863A (en) 1979-12-15

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