JPS6310552U - - Google Patents

Info

Publication number
JPS6310552U
JPS6310552U JP1986104810U JP10481086U JPS6310552U JP S6310552 U JPS6310552 U JP S6310552U JP 1986104810 U JP1986104810 U JP 1986104810U JP 10481086 U JP10481086 U JP 10481086U JP S6310552 U JPS6310552 U JP S6310552U
Authority
JP
Japan
Prior art keywords
conductive layer
resin plate
bonding
electronic circuit
circuit device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1986104810U
Other languages
English (en)
Other versions
JPH0310670Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986104810U priority Critical patent/JPH0310670Y2/ja
Publication of JPS6310552U publication Critical patent/JPS6310552U/ja
Application granted granted Critical
Publication of JPH0310670Y2 publication Critical patent/JPH0310670Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図は、本考案に係る電子回路装置の要部の
み示す縦断面図、第2図は、従来の電子回路装置
の縦断面図である。 21……樹脂板、22,22′……導電層、2
3……貫通孔、24……素子取付部、25……素
子、27……金属細線、31……バンプ部。

Claims (1)

    【実用新案登録請求の範囲】
  1. 樹脂板の表裏両面に導電層を形成するとともに
    、裏面導電層を樹脂板に穿設した貫通孔を介して
    表面に導出し、これら導電層と樹脂板表面の素子
    取付部に固着した素子の電極とをポンデイング結
    線するようにした電子回路装置において、前記導
    電層のボンデイング位置に金線をボンデイングし
    てプレスすることにより形成したバンプ部を設け
    たことを特徴とする電子回路装置。
JP1986104810U 1986-07-08 1986-07-08 Expired JPH0310670Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986104810U JPH0310670Y2 (ja) 1986-07-08 1986-07-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986104810U JPH0310670Y2 (ja) 1986-07-08 1986-07-08

Publications (2)

Publication Number Publication Date
JPS6310552U true JPS6310552U (ja) 1988-01-23
JPH0310670Y2 JPH0310670Y2 (ja) 1991-03-15

Family

ID=30978646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986104810U Expired JPH0310670Y2 (ja) 1986-07-08 1986-07-08

Country Status (1)

Country Link
JP (1) JPH0310670Y2 (ja)

Also Published As

Publication number Publication date
JPH0310670Y2 (ja) 1991-03-15

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