CA2017099C - Correction de parite sequentielle - Google Patents

Correction de parite sequentielle

Info

Publication number
CA2017099C
CA2017099C CA002017099A CA2017099A CA2017099C CA 2017099 C CA2017099 C CA 2017099C CA 002017099 A CA002017099 A CA 002017099A CA 2017099 A CA2017099 A CA 2017099A CA 2017099 C CA2017099 C CA 2017099C
Authority
CA
Canada
Prior art keywords
parity
data
input
processing device
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002017099A
Other languages
English (en)
Other versions
CA2017099A1 (fr
Inventor
Raymond Scott Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of CA2017099A1 publication Critical patent/CA2017099A1/fr
Application granted granted Critical
Publication of CA2017099C publication Critical patent/CA2017099C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/102—Error in check bits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032—Simple parity

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
CA002017099A 1989-05-22 1990-05-18 Correction de parite sequentielle Expired - Fee Related CA2017099C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35467089A 1989-05-22 1989-05-22
US354,670 1989-05-22

Publications (2)

Publication Number Publication Date
CA2017099A1 CA2017099A1 (fr) 1990-11-22
CA2017099C true CA2017099C (fr) 1998-06-23

Family

ID=23394414

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002017099A Expired - Fee Related CA2017099C (fr) 1989-05-22 1990-05-18 Correction de parite sequentielle

Country Status (6)

Country Link
US (1) US5515381A (fr)
EP (1) EP0399761B1 (fr)
JP (1) JP2770913B2 (fr)
AU (1) AU628971B2 (fr)
CA (1) CA2017099C (fr)
DE (1) DE69029164T2 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE36448E (en) * 1991-09-13 1999-12-14 International Business Machines Corporation Memory controller with parity generator for an I/O control unit
JPH0784814A (ja) * 1993-09-16 1995-03-31 Nec Corp 計算機の誤り検出装置
KR100205072B1 (ko) * 1996-12-05 1999-06-15 정선종 디스크 어레이 제어기에서의 vram 기판 패리티 엔진
US6111800A (en) * 1997-12-05 2000-08-29 Cypress Semiconductor Corporation Parallel test for asynchronous memory
US6052818A (en) * 1998-02-27 2000-04-18 International Business Machines Corporation Method and apparatus for ECC bus protection in a computer system with non-parity memory
US6473875B1 (en) * 1999-03-03 2002-10-29 Intel Corporation Error correction for network delivery of video streams using packet resequencing
US6405322B1 (en) * 1999-04-13 2002-06-11 Hewlett-Packard Company System and method for recovery from address errors
RU2211492C2 (ru) * 2001-04-28 2003-08-27 Серпуховский военный институт ракетных войск Отказоустойчивое оперативное запоминающее устройство
US7093190B1 (en) * 2002-07-12 2006-08-15 Unisys Corporation System and method for handling parity errors in a data processing system
US7278080B2 (en) * 2003-03-20 2007-10-02 Arm Limited Error detection and recovery within processing stages of an integrated circuit
US7673190B1 (en) * 2005-09-14 2010-03-02 Unisys Corporation System and method for detecting and recovering from errors in an instruction stream of an electronic data processing system
US7568130B2 (en) * 2006-04-18 2009-07-28 Cisco Technology, Inc. Automated hardware parity and parity error generation technique for high availability integrated circuits
US8151176B2 (en) * 2008-11-13 2012-04-03 Lsi Corporation CPU instruction RAM parity error procedure

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2518588C3 (de) * 1975-04-25 1978-07-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Überwachung der Folgerichtigkeit von Codesignalgruppen in Einrichtungen der Nachrichtentechnik
IT1089225B (it) * 1977-12-23 1985-06-18 Honeywell Inf Systems Memoria con dispositivo rivelatore e correttore a intervento selettivo
US4183463A (en) * 1978-07-31 1980-01-15 Sperry Rand Corporation RAM error correction using two dimensional parity checking
US4410988A (en) * 1978-08-04 1983-10-18 Honeywell Information Systems Inc. Out of cycle error correction apparatus
JPS603219B2 (ja) * 1978-08-25 1985-01-26 富士通株式会社 制御メモリ・エラ−自動訂正処理方式
US4304002A (en) * 1978-11-23 1981-12-01 International Computers Limited Data processing system with error checking
JPS55105897A (en) * 1979-01-31 1980-08-13 Hitachi Koki Co Ltd Memory device
US4360915A (en) * 1979-02-07 1982-11-23 The Warner & Swasey Company Error detection means
US4360917A (en) * 1979-02-07 1982-11-23 The Warner & Swasey Company Parity fault locating means
US4317201A (en) * 1980-04-01 1982-02-23 Honeywell, Inc. Error detecting and correcting RAM assembly
US4360891A (en) * 1980-04-14 1982-11-23 Sperry Corporation Address and data interface unit
JPS57169857A (en) * 1981-04-13 1982-10-19 Mitsubishi Electric Corp Control storage device
US4450562A (en) * 1982-03-26 1984-05-22 Rca Corporation Two level parity error correction system
US4472805A (en) * 1982-03-26 1984-09-18 Rca Corporation Memory system with error storage
JPS6043753A (ja) * 1983-08-18 1985-03-08 Fuji Xerox Co Ltd 故障検出回路
AU3230184A (en) * 1983-08-31 1985-03-07 Amdahl Corporation Multimode scan apparatus
JPS60214043A (ja) * 1984-04-09 1985-10-26 Fujitsu Ltd パイプライン制御回路
JPS6150293A (ja) * 1984-08-17 1986-03-12 Fujitsu Ltd 半導体記憶装置
BR8503913A (pt) * 1984-08-18 1986-05-27 Fujitsu Ltd Sistema e processo de recuperacao de erros em um processador de dados do tipo de canalizacao tendo um dispositivo de memoria de controle e processo de recuperacao de erros em um processador de dados do tipo de canalizacao
US4670876A (en) * 1985-05-15 1987-06-02 Honeywell Inc. Parity integrity check logic
CA1240066A (fr) * 1985-08-15 1988-08-02 John R. Ramsay Circuit de regeneration et de controle de parite pour memoire dynamique
JP2605271B2 (ja) * 1987-02-10 1997-04-30 ソニー株式会社 エラー訂正及びチエツク装置

Also Published As

Publication number Publication date
EP0399761A2 (fr) 1990-11-28
AU5504690A (en) 1990-11-22
JPH0375834A (ja) 1991-03-29
AU628971B2 (en) 1992-09-24
DE69029164T2 (de) 1997-04-17
DE69029164D1 (de) 1997-01-02
EP0399761A3 (fr) 1991-11-21
CA2017099A1 (fr) 1990-11-22
JP2770913B2 (ja) 1998-07-02
US5515381A (en) 1996-05-07
EP0399761B1 (fr) 1996-11-20

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