JPH02114931U - - Google Patents

Info

Publication number
JPH02114931U
JPH02114931U JP1989024503U JP2450389U JPH02114931U JP H02114931 U JPH02114931 U JP H02114931U JP 1989024503 U JP1989024503 U JP 1989024503U JP 2450389 U JP2450389 U JP 2450389U JP H02114931 U JPH02114931 U JP H02114931U
Authority
JP
Japan
Prior art keywords
circuit board
bonding
pattern
bonding pattern
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989024503U
Other languages
English (en)
Other versions
JPH073637Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989024503U priority Critical patent/JPH073637Y2/ja
Publication of JPH02114931U publication Critical patent/JPH02114931U/ja
Application granted granted Critical
Publication of JPH073637Y2 publication Critical patent/JPH073637Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【図面の簡単な説明】
第1図はこの考案の一実施例のボンデイングパ
ターンの要部平面図、第2図は従来例の要部平面
図である。 1A,1B……第二ボンデイングパターン、1
a,1b……第二ボンデイングパターン、2……
ICチツプ、3……第一ボンデイングパターン、
4……回路基板、5……リードワイヤ。

Claims (1)

    【実用新案登録請求の範囲】
  1. 回路基板上にICチツプを塔載し、ICチツプ
    上の第一ボンデイングパターンと回路基板上の第
    二ボンデイングパターンとの間をワイヤボンデイ
    ングによつて接続をとる回路基板のボンデイング
    パターンにおいて、第二ボンデイングパターンが
    第一の端子配設部及び第二の端子配設部に相対応
    してそれぞれ千鳥状に配設されるとともに、それ
    らの形状が噛合状に形成配置されていることを特
    徴としたボンデイングパターン。
JP1989024503U 1989-03-03 1989-03-03 ボンディングパターン Expired - Lifetime JPH073637Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989024503U JPH073637Y2 (ja) 1989-03-03 1989-03-03 ボンディングパターン

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989024503U JPH073637Y2 (ja) 1989-03-03 1989-03-03 ボンディングパターン

Publications (2)

Publication Number Publication Date
JPH02114931U true JPH02114931U (ja) 1990-09-14
JPH073637Y2 JPH073637Y2 (ja) 1995-01-30

Family

ID=31244405

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989024503U Expired - Lifetime JPH073637Y2 (ja) 1989-03-03 1989-03-03 ボンディングパターン

Country Status (1)

Country Link
JP (1) JPH073637Y2 (ja)

Also Published As

Publication number Publication date
JPH073637Y2 (ja) 1995-01-30

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