JPH0516173B2 - - Google Patents

Info

Publication number
JPH0516173B2
JPH0516173B2 JP57175071A JP17507182A JPH0516173B2 JP H0516173 B2 JPH0516173 B2 JP H0516173B2 JP 57175071 A JP57175071 A JP 57175071A JP 17507182 A JP17507182 A JP 17507182A JP H0516173 B2 JPH0516173 B2 JP H0516173B2
Authority
JP
Japan
Prior art keywords
oxide film
substrate
film
isolation region
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57175071A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5965445A (ja
Inventor
Hideaki Takahashi
Ginjiro Kanbara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP57175071A priority Critical patent/JPS5965445A/ja
Publication of JPS5965445A publication Critical patent/JPS5965445A/ja
Publication of JPH0516173B2 publication Critical patent/JPH0516173B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
JP57175071A 1982-10-05 1982-10-05 半導体素子分離領域の形成方法 Granted JPS5965445A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57175071A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57175071A JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Publications (2)

Publication Number Publication Date
JPS5965445A JPS5965445A (ja) 1984-04-13
JPH0516173B2 true JPH0516173B2 (2) 1993-03-03

Family

ID=15989717

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57175071A Granted JPS5965445A (ja) 1982-10-05 1982-10-05 半導体素子分離領域の形成方法

Country Status (1)

Country Link
JP (1) JPS5965445A (2)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8401711A (nl) * 1984-05-29 1985-12-16 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een siliciumlichaam waarin plaatselijk een verzonken oxidelaag is aangebracht.
JPH01315141A (ja) * 1988-06-15 1989-12-20 Toshiba Corp 半導体装置の製造方法
US5260229A (en) * 1991-08-30 1993-11-09 Sgs-Thomson Microelectronics, Inc. Method of forming isolated regions of oxide
KR0159532B1 (ko) * 1991-12-24 1999-02-01 아이자와 스스무 반도체장치의 제조방법 및 반도체장치
EP0637074A3 (en) 1993-07-30 1995-06-21 Sgs Thomson Microelectronics Process for the production of active and isolated areas by split imaging.
US5977607A (en) * 1994-09-12 1999-11-02 Stmicroelectronics, Inc. Method of forming isolated regions of oxide
KR100197651B1 (ko) * 1995-11-03 1999-06-15 김영환 반도체 소자의 소자 분리막 제조방법
US5972776A (en) * 1995-12-22 1999-10-26 Stmicroelectronics, Inc. Method of forming a planar isolation structure in an integrated circuit
US5834360A (en) * 1996-07-31 1998-11-10 Stmicroelectronics, Inc. Method of forming an improved planar isolation structure in an integrated circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4333964A (en) * 1980-09-15 1982-06-08 General Electric Company Method of making integrated circuits

Also Published As

Publication number Publication date
JPS5965445A (ja) 1984-04-13

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